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See "Encoding 32-bit address operands in load/stores" in section 10.9 of "Qualcomm Hexagon V66 Programmer's Reference Manual"
For unconditional load/stores, the GP-relative load/store instruction is used. [...] In this case the 32-bit value encoded must be a plain address, and the value stored in the GP register is ignored.
binja-hexagon correctly disassembles some code as
{ immext(<blah>)
R3 = memw(0+<extended>) }
But ghidra-plugin-hexagon shows a GP-relative address instead
The text was updated successfully, but these errors were encountered:
For instructions which read C11 aka the gp register, such as
L2_loadrubgp, gp should only be consulted if an immext was *not*
applied.
For example, immext is applied below so the memref is not gp-rel:
{ immext(##0x123440)
R0 = memw(#0+##0x123450)
jumpr R31 }
But this is gp-rel:
{ R0 = memw(GP+##0x10)
jumpr R31 }
Fixes this issue by adding a "gp" sleigh constructor that's conditional
on the immext context reg, and adds C11 or 0 as an operand based on the
above
Fixes#5
For instructions which read C11 aka the gp register, such as
L2_loadrubgp, gp should only be consulted if an immext was *not*
applied.
For example, immext is applied below so the memref is not gp-rel:
{ immext(##0x123440)
R0 = memw(#0+##0x123450)
jumpr R31 }
But this is gp-rel:
{ R0 = memw(GP+##0x10)
jumpr R31 }
Fixes this issue by adding a "gp" sleigh constructor that's conditional
on the immext context reg, and adds C11 or 0 as an operand based on the
above
Fixes#5
See "Encoding 32-bit address operands in load/stores" in section 10.9 of "Qualcomm Hexagon V66 Programmer's Reference Manual"
binja-hexagon correctly disassembles some code as
But ghidra-plugin-hexagon shows a GP-relative address instead
The text was updated successfully, but these errors were encountered: