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Expose Result Register for Native CPU (#2470)
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* get_return_reg

* rename get_return_reg to get_result_reg

* function_abi property

* function_abi move + syscall_abi
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sschriner committed Jul 22, 2021
1 parent 378f8e8 commit dc5e57b
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Showing 5 changed files with 44 additions and 1 deletion.
6 changes: 6 additions & 0 deletions manticore/native/cpu/aarch64.py
Original file line number Diff line number Diff line change
Expand Up @@ -5302,6 +5302,9 @@ def get_arguments(self):
for address in self.values_from(self._cpu.STACK):
yield address

def get_result_reg(self):
return "X0"

def write_result(self, result):
self._cpu.X0 = result

Expand All @@ -5324,6 +5327,9 @@ def syscall_number(self):
def get_arguments(self):
return ("X{}".format(i) for i in range(6))

def get_result_reg(self):
return "X0"

def write_result(self, result):
self._cpu.X0 = result

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9 changes: 9 additions & 0 deletions manticore/native/cpu/abstractcpu.py
Original file line number Diff line number Diff line change
Expand Up @@ -294,6 +294,15 @@ def get_arguments(self):
"""
raise NotImplementedError

def get_result_reg(self) -> str:
"""
Extract the location a return value will be written to. Produces
a string describing a register where the return value is written to.
:return: return register name
:rtype: string
"""
raise NotImplementedError

def write_result(self, result):
"""
Write the result of a model back to the environment.
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3 changes: 3 additions & 0 deletions manticore/native/cpu/arm.py
Original file line number Diff line number Diff line change
Expand Up @@ -555,6 +555,9 @@ def get_arguments(self):
for i in range(6):
yield f"R{i}"

def get_result_reg(self):
return "R0"

def write_result(self, result):
self._cpu.R0 = result

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15 changes: 15 additions & 0 deletions manticore/native/cpu/x86.py
Original file line number Diff line number Diff line change
Expand Up @@ -6394,6 +6394,9 @@ def get_arguments(self):
for reg in ("EBX", "ECX", "EDX", "ESI", "EDI", "EBP"):
yield reg

def get_result_reg(self):
return "EAX"

def write_result(self, result):
self._cpu.EAX = result

Expand All @@ -6413,6 +6416,9 @@ def get_arguments(self):
for reg in ("RDI", "RSI", "RDX", "R10", "R8", "R9"):
yield reg

def get_result_reg(self):
return "RAX"

def write_result(self, result):
self._cpu.RAX = result

Expand All @@ -6427,6 +6433,9 @@ def get_arguments(self):
for address in self.values_from(base):
yield address

def get_result_reg(self):
return "EAX"

def write_result(self, result):
self._cpu.EAX = result

Expand All @@ -6449,6 +6458,9 @@ def get_arguments(self):
self._arguments += 1
yield address

def get_result_reg(self):
return "EAX"

def write_result(self, result):
self._cpu.EAX = result

Expand Down Expand Up @@ -6479,6 +6491,9 @@ def get_arguments(self):
for address in self.values_from(self._cpu.RSP + word_bytes):
yield address

def get_result_reg(self):
return "RAX"

def write_result(self, result):
# XXX(yan): Can also return in rdx for wide values.
self._cpu.RAX = result
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12 changes: 11 additions & 1 deletion manticore/platforms/linux.py
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@
from ..core.smtlib import ConstraintSet, Operators, Expression, issymbolic, ArrayProxy
from ..core.smtlib.solver import SelectedSolver
from ..exceptions import SolverError
from ..native.cpu.abstractcpu import Cpu, Syscall, ConcretizeArgument, Interruption
from ..native.cpu.abstractcpu import Cpu, Syscall, ConcretizeArgument, Interruption, Abi, SyscallAbi
from ..native.cpu.cpufactory import CpuFactory
from ..native.memory import (
SMemory32,
Expand Down Expand Up @@ -1000,6 +1000,16 @@ def current(self) -> Cpu:
assert self._current is not None
return self.procs[self._current]

@property
def function_abi(self) -> Abi:
assert self._function_abi is not None
return self._function_abi

@property
def syscall_abi(self) -> SyscallAbi:
assert self._syscall_abi is not None
return self._syscall_abi

def __getstate__(self):
state = super().__getstate__()
state["clocks"] = self.clocks
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