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Rename :dl_src -> :eth_src_addr and :dl_dst -> :eth_dst_addr.
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yasuhito committed Apr 14, 2015
1 parent 4a1a29d commit 3b61993
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Showing 6 changed files with 74 additions and 74 deletions.
56 changes: 28 additions & 28 deletions features/open_flow10/exact_match.feature
Expand Up @@ -2,35 +2,35 @@ Feature: Exact Match
Scenario: parse #1
When I create an exact match from "packet_in_arp_request.raw"
And the message have the following fields and values:
| field | value |
| wildcards | {} |
| in_port | 1 |
| dl_src | ac:5d:10:31:37:79 |
| dl_dst | ff:ff:ff:ff:ff:ff |
| dl_vlan | 65535 |
| dl_vlan_pcp | 0 |
| dl_type | 2054 |
| nw_tos | 0 |
| nw_proto | 1 |
| nw_src | 192.168.2.254 |
| nw_dst | 192.168.2.5 |
| tp_src | 0 |
| tp_dst | 0 |
| field | value |
| wildcards | {} |
| in_port | 1 |
| eth_src_addr | ac:5d:10:31:37:79 |
| eth_dst_addr | ff:ff:ff:ff:ff:ff |
| dl_vlan | 65535 |
| dl_vlan_pcp | 0 |
| dl_type | 2054 |
| nw_tos | 0 |
| nw_proto | 1 |
| nw_src | 192.168.2.254 |
| nw_dst | 192.168.2.5 |
| tp_src | 0 |
| tp_dst | 0 |

Scenario: parse #2
When I create an exact match from "packet_in_cbench.raw"
And the message have the following fields and values:
| field | value |
| wildcards | {} |
| in_port | 1 |
| dl_src | 00:00:00:00:00:01 |
| dl_dst | 80:00:00:00:00:01 |
| dl_vlan | 65535 |
| dl_vlan_pcp | 0 |
| dl_type | 2048 |
| nw_tos | 0 |
| nw_proto | 255 |
| nw_src | 192.168.0.40 |
| nw_dst | 192.168.1.40 |
| tp_src | 31256 |
| tp_dst | 22635 |
| field | value |
| wildcards | {} |
| in_port | 1 |
| eth_src_addr | 00:00:00:00:00:01 |
| eth_dst_addr | 80:00:00:00:00:01 |
| dl_vlan | 65535 |
| dl_vlan_pcp | 0 |
| dl_type | 2048 |
| nw_tos | 0 |
| nw_proto | 255 |
| nw_src | 192.168.0.40 |
| nw_dst | 192.168.1.40 |
| tp_src | 31256 |
| tp_dst | 22635 |
20 changes: 10 additions & 10 deletions features/open_flow10/flow_mod.feature
Expand Up @@ -11,8 +11,8 @@ Feature: Flow Mod
| xid | 0 |
| match.wildcards | {:nw_src=>24, :nw_dst=>24} |
| match.in_port | 1 |
| match.dl_src | 00:00:00:00:00:0a |
| match.dl_dst | 00:00:00:00:00:14 |
| match.eth_src_addr | 00:00:00:00:00:0a |
| match.eth_dst_addr | 00:00:00:00:00:14 |
| match.dl_vlan | 0 |
| match.dl_vlan_pcp | 0 |
| match.dl_type | 2048 |
Expand Down Expand Up @@ -48,8 +48,8 @@ Feature: Flow Mod
| xid | 0 |
| match.wildcards | {:nw_src=>24, :nw_dst=>24} |
| match.in_port | 1 |
| match.dl_src | 00:00:00:00:00:0a |
| match.dl_dst | 00:00:00:00:00:14 |
| match.eth_src_addr | 00:00:00:00:00:0a |
| match.eth_dst_addr | 00:00:00:00:00:14 |
| match.dl_vlan | 0 |
| match.dl_vlan_pcp | 0 |
| match.dl_type | 2048 |
Expand Down Expand Up @@ -85,8 +85,8 @@ Scenario: parse (Flow Mod Modify Strict)
| xid | 0 |
| match.wildcards | {:nw_src=>24, :nw_dst=>24} |
| match.in_port | 1 |
| match.dl_src | 00:00:00:00:00:0a |
| match.dl_dst | 00:00:00:00:00:14 |
| match.eth_src_addr | 00:00:00:00:00:0a |
| match.eth_dst_addr | 00:00:00:00:00:14 |
| match.dl_vlan | 0 |
| match.dl_vlan_pcp | 0 |
| match.dl_type | 2048 |
Expand Down Expand Up @@ -122,8 +122,8 @@ Scenario: parse (Flow Mod Modify Strict)
| xid | 0 |
| match.wildcards | {:nw_src=>24, :nw_dst=>24} |
| match.in_port | 1 |
| match.dl_src | 00:00:00:00:00:0a |
| match.dl_dst | 00:00:00:00:00:00 |
| match.eth_src_addr | 00:00:00:00:00:0a |
| match.eth_dst_addr | 00:00:00:00:00:00 |
| match.dl_vlan | 0 |
| match.dl_vlan_pcp | 0 |
| match.dl_type | 2048 |
Expand Down Expand Up @@ -157,8 +157,8 @@ Scenario: parse (Flow Mod Delete Strict)
| xid | 0 |
| match.wildcards | {:nw_src=>24, :nw_dst=>24} |
| match.in_port | 1 |
| match.dl_src | 00:00:00:00:00:0a |
| match.dl_dst | 00:00:00:00:00:14 |
| match.eth_src_addr | 00:00:00:00:00:0a |
| match.eth_dst_addr | 00:00:00:00:00:14 |
| match.dl_vlan | 0 |
| match.dl_vlan_pcp | 0 |
| match.dl_type | 2048 |
Expand Down
8 changes: 4 additions & 4 deletions lib/pio/exact_match.rb
Expand Up @@ -11,8 +11,8 @@ def initialize(packet_in)
when PacketIn::DataParser::IPv4Packet
options = {
in_port: packet_in.in_port,
dl_src: packet_in.source_mac,
dl_dst: packet_in.destination_mac,
eth_src_addr: packet_in.source_mac,
eth_dst_addr: packet_in.destination_mac,
dl_vlan: data.vlan_vid,
dl_vlan_pcp: data.vlan_pcp,
dl_type: data.ether_type,
Expand All @@ -26,8 +26,8 @@ def initialize(packet_in)
when Arp::Request
options = {
in_port: packet_in.in_port,
dl_src: packet_in.source_mac,
dl_dst: packet_in.destination_mac,
eth_src_addr: packet_in.source_mac,
eth_dst_addr: packet_in.destination_mac,
dl_vlan: data.vlan_vid,
dl_vlan_pcp: data.vlan_pcp,
dl_type: data.ether_type,
Expand Down
8 changes: 4 additions & 4 deletions lib/pio/match.rb
Expand Up @@ -12,8 +12,8 @@ class Wildcards < BinData::Primitive
BITS = {
in_port: 1 << 0,
dl_vlan: 1 << 1,
dl_src: 1 << 2,
dl_dst: 1 << 3,
eth_src_addr: 1 << 2,
eth_dst_addr: 1 << 3,
dl_type: 1 << 4,
nw_proto: 1 << 5,
tp_src: 1 << 6,
Expand Down Expand Up @@ -105,8 +105,8 @@ class MatchFormat < BinData::Record

wildcards :wildcards
uint16 :in_port
mac_address :dl_src
mac_address :dl_dst
mac_address :eth_src_addr
mac_address :eth_dst_addr
uint16 :dl_vlan
uint8 :dl_vlan_pcp
uint8 :padding1
Expand Down
16 changes: 8 additions & 8 deletions spec/pio/flow_mod_spec.rb
Expand Up @@ -40,8 +40,8 @@
Then do
flow_mod.match.wildcards.keys == [
:dl_vlan,
:dl_src,
:dl_dst,
:eth_src_addr,
:eth_dst_addr,
:dl_type,
:nw_proto,
:tp_src,
Expand All @@ -53,8 +53,8 @@
]
end
Then { flow_mod.match.in_port == 1 }
Then { flow_mod.match.dl_src == '00:00:00:00:00:00' }
Then { flow_mod.match.dl_dst == '00:00:00:00:00:00' }
Then { flow_mod.match.eth_src_addr == '00:00:00:00:00:00' }
Then { flow_mod.match.eth_dst_addr == '00:00:00:00:00:00' }
Then { flow_mod.match.dl_vlan == 0 }
Then { flow_mod.match.dl_vlan_pcp == 0 }
Then { flow_mod.match.dl_type == 0 }
Expand Down Expand Up @@ -105,8 +105,8 @@
Then do
flow_mod.match.wildcards.keys == [
:dl_vlan,
:dl_src,
:dl_dst,
:eth_src_addr,
:eth_dst_addr,
:dl_type,
:nw_proto,
:tp_src,
Expand All @@ -118,8 +118,8 @@
]
end
Then { flow_mod.match.in_port == 1 }
Then { flow_mod.match.dl_src == '00:00:00:00:00:00' }
Then { flow_mod.match.dl_dst == '00:00:00:00:00:00' }
Then { flow_mod.match.eth_src_addr == '00:00:00:00:00:00' }
Then { flow_mod.match.eth_dst_addr == '00:00:00:00:00:00' }
Then { flow_mod.match.dl_vlan == 0 }
Then { flow_mod.match.dl_vlan_pcp == 0 }
Then { flow_mod.match.dl_type == 0 }
Expand Down
40 changes: 20 additions & 20 deletions spec/pio/match_spec.rb
Expand Up @@ -28,8 +28,8 @@
Then do
match.wildcards.keys == [
:dl_vlan,
:dl_src,
:dl_dst,
:eth_src_addr,
:eth_dst_addr,
:dl_type,
:nw_proto,
:tp_src,
Expand All @@ -41,8 +41,8 @@
]
end
Then { match.in_port == 1 }
Then { match.dl_src == '00:00:00:00:00:00' }
Then { match.dl_dst == '00:00:00:00:00:00' }
Then { match.eth_src_addr == '00:00:00:00:00:00' }
Then { match.eth_dst_addr == '00:00:00:00:00:00' }
Then { match.dl_vlan == 0 }
Then { match.dl_vlan_pcp == 0 }
Then { match.dl_type == 0 }
Expand All @@ -61,8 +61,8 @@
match.wildcards.keys == [
:in_port,
:dl_vlan,
:dl_src,
:dl_dst,
:eth_src_addr,
:eth_dst_addr,
:dl_type,
:nw_proto,
:tp_src,
Expand All @@ -75,8 +75,8 @@
end
And { match.wildcards[:nw_src] = 12 }
Then { match.in_port == 0 }
Then { match.dl_src == '00:00:00:00:00:00' }
Then { match.dl_dst == '00:00:00:00:00:00' }
Then { match.eth_src_addr == '00:00:00:00:00:00' }
Then { match.eth_dst_addr == '00:00:00:00:00:00' }
Then { match.dl_vlan == 0 }
Then { match.dl_vlan_pcp == 0 }
Then { match.dl_type == 0 }
Expand All @@ -98,8 +98,8 @@
Then do
match.wildcards.keys == [
:dl_vlan,
:dl_src,
:dl_dst,
:eth_src_addr,
:eth_dst_addr,
:dl_type,
:nw_proto,
:tp_src,
Expand All @@ -111,8 +111,8 @@
]
end
Then { match.in_port == 1 }
Then { match.dl_src == '00:00:00:00:00:00' }
Then { match.dl_dst == '00:00:00:00:00:00' }
Then { match.eth_src_addr == '00:00:00:00:00:00' }
Then { match.eth_dst_addr == '00:00:00:00:00:00' }
Then { match.dl_vlan == 0 }
Then { match.dl_vlan_pcp == 0 }
Then { match.dl_type == 0 }
Expand All @@ -139,8 +139,8 @@
match.wildcards.keys == [
:in_port,
:dl_vlan,
:dl_src,
:dl_dst,
:eth_src_addr,
:eth_dst_addr,
:dl_type,
:nw_proto,
:tp_src,
Expand All @@ -153,8 +153,8 @@
end
Then { match.wildcards.fetch(:nw_src) == 8 }
Then { match.in_port == 0 }
Then { match.dl_src == '00:00:00:00:00:00' }
Then { match.dl_dst == '00:00:00:00:00:00' }
Then { match.eth_src_addr == '00:00:00:00:00:00' }
Then { match.eth_dst_addr == '00:00:00:00:00:00' }
Then { match.dl_vlan == 0 }
Then { match.dl_vlan_pcp == 0 }
Then { match.dl_type == 0 }
Expand All @@ -172,8 +172,8 @@
match.wildcards.keys == [
:in_port,
:dl_vlan,
:dl_src,
:dl_dst,
:eth_src_addr,
:eth_dst_addr,
:dl_type,
:nw_proto,
:tp_src,
Expand All @@ -186,8 +186,8 @@
end
Then { match.wildcards.fetch(:nw_dst) == 8 }
Then { match.in_port == 0 }
Then { match.dl_src == '00:00:00:00:00:00' }
Then { match.dl_dst == '00:00:00:00:00:00' }
Then { match.eth_src_addr == '00:00:00:00:00:00' }
Then { match.eth_dst_addr == '00:00:00:00:00:00' }
Then { match.dl_vlan == 0 }
Then { match.dl_vlan_pcp == 0 }
Then { match.dl_type == 0 }
Expand Down

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