Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
mips: mtmips: add two reference boards for mt7621
The mt7621_rfb board supports integrated giga PHYs plus one external giga PHYs. It also has up to 512MiB DDR3, 16MB SPI-NOR, 3 mini PCI-e x1 slots, SDXC and USB. The mt7621_nand_rfb board is almost the same as mt7621_rfb board, but it uses NAND flash and SDXC is not available. Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
- Loading branch information
1 parent
4bc0104
commit 0eaee02
Showing
9 changed files
with
363 additions
and
0 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,67 @@ | ||
// SPDX-License-Identifier: GPL-2.0 | ||
/* | ||
* Copyright (C) 2022 MediaTek Inc. All rights reserved. | ||
* | ||
* Author: Weijie Gao <weijie.gao@mediatek.com> | ||
*/ | ||
|
||
/dts-v1/; | ||
|
||
#include "mt7621.dtsi" | ||
|
||
/ { | ||
compatible = "mediatek,mt7621-nand-rfb", "mediatek,mt7621-soc"; | ||
model = "MediaTek MT7621 RFB (NAND)"; | ||
|
||
aliases { | ||
serial0 = &uart0; | ||
}; | ||
|
||
chosen { | ||
stdout-path = &uart0; | ||
}; | ||
}; | ||
|
||
&pinctrl { | ||
state_default: pin_state { | ||
nand { | ||
groups = "spi", "sdxc"; | ||
function = "nand"; | ||
}; | ||
|
||
gpios { | ||
groups = "i2c", "uart3", "pcie reset"; | ||
function = "gpio"; | ||
}; | ||
|
||
wdt { | ||
groups = "wdt"; | ||
function = "wdt rst"; | ||
}; | ||
|
||
jtag { | ||
groups = "jtag"; | ||
function = "jtag"; | ||
}; | ||
}; | ||
}; | ||
|
||
&uart0 { | ||
status = "okay"; | ||
}; | ||
|
||
&gpio { | ||
status = "okay"; | ||
}; | ||
|
||
ð { | ||
status = "okay"; | ||
}; | ||
|
||
&ssusb { | ||
status = "okay"; | ||
}; | ||
|
||
&u3phy { | ||
status = "okay"; | ||
}; |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,82 @@ | ||
// SPDX-License-Identifier: GPL-2.0 | ||
/* | ||
* Copyright (C) 2022 MediaTek Inc. All rights reserved. | ||
* | ||
* Author: Weijie Gao <weijie.gao@mediatek.com> | ||
*/ | ||
|
||
/dts-v1/; | ||
|
||
#include "mt7621.dtsi" | ||
|
||
/ { | ||
compatible = "mediatek,mt7621-rfb", "mediatek,mt7621-soc"; | ||
model = "MediaTek MT7621 RFB (SPI-NOR)"; | ||
|
||
aliases { | ||
serial0 = &uart0; | ||
spi0 = &spi; | ||
}; | ||
|
||
chosen { | ||
stdout-path = &uart0; | ||
}; | ||
}; | ||
|
||
&pinctrl { | ||
state_default: pin_state { | ||
gpios { | ||
groups = "i2c", "uart3", "pcie reset"; | ||
function = "gpio"; | ||
}; | ||
|
||
wdt { | ||
groups = "wdt"; | ||
function = "wdt rst"; | ||
}; | ||
|
||
jtag { | ||
groups = "jtag"; | ||
function = "jtag"; | ||
}; | ||
}; | ||
}; | ||
|
||
&uart0 { | ||
status = "okay"; | ||
}; | ||
|
||
&gpio { | ||
status = "okay"; | ||
}; | ||
|
||
&spi { | ||
status = "okay"; | ||
num-cs = <2>; | ||
|
||
spi-flash@0 { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
compatible = "jedec,spi-nor"; | ||
spi-max-frequency = <25000000>; | ||
reg = <0>; | ||
}; | ||
}; | ||
|
||
ð { | ||
status = "okay"; | ||
}; | ||
|
||
&mmc { | ||
cap-sd-highspeed; | ||
|
||
status = "okay"; | ||
}; | ||
|
||
&ssusb { | ||
status = "okay"; | ||
}; | ||
|
||
&u3phy { | ||
status = "okay"; | ||
}; |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,8 @@ | ||
MT7621_RFB BOARD | ||
M: Weijie Gao <weijie.gao@mediatek.com> | ||
S: Maintained | ||
F: board/mediatek/mt7621 | ||
F: configs/mt7621_rfb_defconfig | ||
F: configs/mt7621_nand_rfb_defconfig | ||
F: arch/mips/dts/mediatek,mt7621-rfb.dts | ||
F: arch/mips/dts/mediatek,mt7621-nand-rfb.dts |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,3 @@ | ||
# SPDX-License-Identifier: GPL-2.0 | ||
|
||
obj-y += board.o |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,6 @@ | ||
// SPDX-License-Identifier: GPL-2.0 | ||
/* | ||
* Copyright (C) 2022 MediaTek Inc. All rights reserved. | ||
* | ||
* Author: Weijie Gao <weijie.gao@mediatek.com> | ||
*/ |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,89 @@ | ||
CONFIG_MIPS=y | ||
CONFIG_SYS_MALLOC_LEN=0x100000 | ||
CONFIG_SPL_LIBCOMMON_SUPPORT=y | ||
CONFIG_SPL_LIBGENERIC_SUPPORT=y | ||
CONFIG_NR_DRAM_BANKS=1 | ||
CONFIG_ENV_SIZE=0x1000 | ||
CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7621-nand-rfb" | ||
CONFIG_SPL_SERIAL=y | ||
CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 | ||
CONFIG_SPL=y | ||
CONFIG_DEBUG_UART_BASE=0xbe000c00 | ||
CONFIG_DEBUG_UART_CLOCK=50000000 | ||
CONFIG_SYS_LOAD_ADDR=0x83000000 | ||
CONFIG_ARCH_MTMIPS=y | ||
CONFIG_SOC_MT7621=y | ||
CONFIG_MT7621_BOOT_FROM_NAND=y | ||
CONFIG_BOARD_MT7621_NAND_RFB=y | ||
# CONFIG_MIPS_CACHE_SETUP is not set | ||
# CONFIG_MIPS_CACHE_DISABLE is not set | ||
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y | ||
CONFIG_MIPS_BOOT_FDT=y | ||
CONFIG_DEBUG_UART=y | ||
CONFIG_FIT=y | ||
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set | ||
CONFIG_SYS_CONSOLE_INFO_QUIET=y | ||
CONFIG_SPL_MAX_SIZE=0x30000 | ||
CONFIG_SPL_BSS_START_ADDR=0x80140000 | ||
CONFIG_SPL_BSS_MAX_SIZE=0x80000 | ||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y | ||
CONFIG_SPL_NAND_SUPPORT=y | ||
CONFIG_SPL_NAND_BASE=y | ||
CONFIG_SPL_NAND_IDENT=y | ||
# CONFIG_BOOTM_NETBSD is not set | ||
# CONFIG_BOOTM_PLAN9 is not set | ||
# CONFIG_BOOTM_RTEMS is not set | ||
# CONFIG_BOOTM_VXWORKS is not set | ||
CONFIG_SYS_BOOTM_LEN=0x2000000 | ||
# CONFIG_CMD_ELF is not set | ||
# CONFIG_CMD_XIMG is not set | ||
# CONFIG_CMD_CRC32 is not set | ||
# CONFIG_CMD_DM is not set | ||
# CONFIG_CMD_FLASH is not set | ||
CONFIG_CMD_GPIO=y | ||
# CONFIG_CMD_LOADS is not set | ||
CONFIG_CMD_MMC=y | ||
CONFIG_CMD_MTD=y | ||
CONFIG_CMD_PART=y | ||
# CONFIG_CMD_PINMUX is not set | ||
CONFIG_CMD_USB=y | ||
# CONFIG_CMD_NFS is not set | ||
CONFIG_CMD_FAT=y | ||
CONFIG_CMD_FS_GENERIC=y | ||
# CONFIG_SPL_DOS_PARTITION is not set | ||
# CONFIG_ISO_PARTITION is not set | ||
CONFIG_EFI_PARTITION=y | ||
# CONFIG_SPL_EFI_PARTITION is not set | ||
CONFIG_PARTITION_TYPE_GUID=y | ||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y | ||
CONFIG_NET_RANDOM_ETHADDR=y | ||
# CONFIG_I2C is not set | ||
# CONFIG_INPUT is not set | ||
CONFIG_MMC=y | ||
# CONFIG_MMC_QUIRKS is not set | ||
# CONFIG_MMC_HW_PARTITIONING is not set | ||
CONFIG_MMC_MTK=y | ||
CONFIG_MTD=y | ||
CONFIG_DM_MTD=y | ||
CONFIG_MTD_RAW_NAND=y | ||
CONFIG_NAND_MT7621=y | ||
CONFIG_SYS_NAND_ONFI_DETECTION=y | ||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y | ||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x0 | ||
CONFIG_MEDIATEK_ETH=y | ||
CONFIG_PHY=y | ||
CONFIG_PHY_MTK_TPHY=y | ||
CONFIG_DEBUG_UART_SHIFT=2 | ||
CONFIG_SYSRESET=y | ||
CONFIG_SYSRESET_RESETCTL=y | ||
CONFIG_USB=y | ||
CONFIG_USB_XHCI_HCD=y | ||
CONFIG_USB_XHCI_MTK=y | ||
CONFIG_USB_STORAGE=y | ||
CONFIG_WDT=y | ||
CONFIG_WDT_MT7621=y | ||
CONFIG_FAT_WRITE=y | ||
# CONFIG_BINMAN_FDT is not set | ||
CONFIG_LZMA=y | ||
# CONFIG_GZIP is not set | ||
CONFIG_SPL_LZMA=y |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,86 @@ | ||
CONFIG_MIPS=y | ||
CONFIG_SYS_MALLOC_LEN=0x100000 | ||
CONFIG_SPL_LIBCOMMON_SUPPORT=y | ||
CONFIG_SPL_LIBGENERIC_SUPPORT=y | ||
CONFIG_NR_DRAM_BANKS=1 | ||
CONFIG_ENV_SIZE=0x1000 | ||
CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7621-rfb" | ||
CONFIG_SPL_SERIAL=y | ||
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 | ||
CONFIG_SPL=y | ||
CONFIG_DEBUG_UART_BASE=0xbe000c00 | ||
CONFIG_DEBUG_UART_CLOCK=50000000 | ||
CONFIG_SYS_LOAD_ADDR=0x83000000 | ||
CONFIG_ARCH_MTMIPS=y | ||
CONFIG_SOC_MT7621=y | ||
# CONFIG_MIPS_CACHE_SETUP is not set | ||
# CONFIG_MIPS_CACHE_DISABLE is not set | ||
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y | ||
CONFIG_MIPS_BOOT_FDT=y | ||
CONFIG_DEBUG_UART=y | ||
CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000 | ||
CONFIG_FIT=y | ||
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set | ||
CONFIG_SYS_CONSOLE_INFO_QUIET=y | ||
CONFIG_SPL_MAX_SIZE=0x30000 | ||
CONFIG_SPL_BSS_START_ADDR=0x80140000 | ||
CONFIG_SPL_BSS_MAX_SIZE=0x80000 | ||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y | ||
CONFIG_SPL_NOR_SUPPORT=y | ||
CONFIG_TPL=y | ||
# CONFIG_TPL_FRAMEWORK is not set | ||
# CONFIG_BOOTM_NETBSD is not set | ||
# CONFIG_BOOTM_PLAN9 is not set | ||
# CONFIG_BOOTM_RTEMS is not set | ||
# CONFIG_BOOTM_VXWORKS is not set | ||
CONFIG_SYS_BOOTM_LEN=0x2000000 | ||
# CONFIG_CMD_ELF is not set | ||
# CONFIG_CMD_XIMG is not set | ||
# CONFIG_CMD_CRC32 is not set | ||
# CONFIG_CMD_DM is not set | ||
CONFIG_CMD_GPIO=y | ||
# CONFIG_CMD_LOADS is not set | ||
CONFIG_CMD_MMC=y | ||
CONFIG_CMD_PART=y | ||
# CONFIG_CMD_PINMUX is not set | ||
CONFIG_CMD_SPI=y | ||
# CONFIG_CMD_NFS is not set | ||
CONFIG_DOS_PARTITION=y | ||
# CONFIG_SPL_DOS_PARTITION is not set | ||
# CONFIG_ISO_PARTITION is not set | ||
CONFIG_EFI_PARTITION=y | ||
# CONFIG_SPL_EFI_PARTITION is not set | ||
CONFIG_PARTITION_TYPE_GUID=y | ||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y | ||
CONFIG_NET_RANDOM_ETHADDR=y | ||
# CONFIG_I2C is not set | ||
# CONFIG_INPUT is not set | ||
CONFIG_MMC=y | ||
# CONFIG_MMC_QUIRKS is not set | ||
# CONFIG_MMC_HW_PARTITIONING is not set | ||
CONFIG_MMC_MTK=y | ||
CONFIG_SF_DEFAULT_SPEED=20000000 | ||
CONFIG_SPI_FLASH_BAR=y | ||
CONFIG_SPI_FLASH_EON=y | ||
CONFIG_SPI_FLASH_GIGADEVICE=y | ||
CONFIG_SPI_FLASH_ISSI=y | ||
CONFIG_SPI_FLASH_MACRONIX=y | ||
CONFIG_SPI_FLASH_SPANSION=y | ||
CONFIG_SPI_FLASH_STMICRO=y | ||
CONFIG_SPI_FLASH_WINBOND=y | ||
CONFIG_SPI_FLASH_XMC=y | ||
CONFIG_SPI_FLASH_XTX=y | ||
CONFIG_MEDIATEK_ETH=y | ||
CONFIG_PHY=y | ||
CONFIG_PHY_MTK_TPHY=y | ||
CONFIG_DEBUG_UART_SHIFT=2 | ||
CONFIG_SPI=y | ||
CONFIG_MT7621_SPI=y | ||
CONFIG_SYSRESET=y | ||
CONFIG_SYSRESET_RESETCTL=y | ||
CONFIG_WDT=y | ||
CONFIG_WDT_MT7621=y | ||
# CONFIG_BINMAN_FDT is not set | ||
CONFIG_LZMA=y | ||
# CONFIG_GZIP is not set | ||
CONFIG_SPL_LZMA=y |