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Merge branch 'master' of git://git.denx.de/u-boot-ti
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trini committed Dec 8, 2014
2 parents 8bd60cc + 956a8ba commit 98d2d5e
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Showing 56 changed files with 870 additions and 101 deletions.
17 changes: 14 additions & 3 deletions arch/arm/cpu/armv7/omap-common/boot-common.c
Expand Up @@ -33,8 +33,19 @@ void save_omap_boot_params(void)
* used. But it not correct to assume that romcode structure
* encoding would be same as u-boot. So use the defined offsets.
*/
gd->arch.omap_boot_params.omap_bootdevice = boot_device =
*((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
boot_device = *((u8 *)(rom_params + BOOT_DEVICE_OFFSET));

#if defined(BOOT_DEVICE_NAND_I2C)
/*
* Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
* Otherwise the SPL boot IF can't handle this device correctly.
* Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
* Draco leads to this boot-device passed to SPL from the BootROM.
*/
if (boot_device == BOOT_DEVICE_NAND_I2C)
boot_device = BOOT_DEVICE_NAND;
#endif
gd->arch.omap_boot_params.omap_bootdevice = boot_device;

gd->arch.omap_boot_params.ch_flags =
*((u8 *)(rom_params + CH_FLAGS_OFFSET));
Expand All @@ -57,7 +68,7 @@ void save_omap_boot_params(void)
}
}

#ifdef CONFIG_DRA7XX
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
/*
* We get different values for QSPI_1 and QSPI_4 being used, but
* don't actually care about this difference. Rather than
Expand Down
9 changes: 5 additions & 4 deletions arch/arm/cpu/armv7/omap-common/emif-common.c
Expand Up @@ -1226,13 +1226,14 @@ void dmm_init(u32 base)
emif1_enabled = 1;
emif2_enabled = 1;
break;
} else if (valid == 1) {
}

if (valid == 1)
emif1_enabled = 1;
} else if (valid == 2) {

if (valid == 2)
emif2_enabled = 1;
}
}

}

static void do_bug0039_workaround(u32 base)
Expand Down
4 changes: 4 additions & 0 deletions arch/arm/cpu/armv7/omap5/Kconfig
Expand Up @@ -12,6 +12,9 @@ config TARGET_OMAP5_UEVM
config TARGET_DRA7XX_EVM
bool "TI DRA7XX"

config TARGET_BEAGLE_X15
bool "BeagleBoard X15"

endchoice

config SYS_SOC
Expand All @@ -20,5 +23,6 @@ config SYS_SOC
source "board/compulab/cm_t54/Kconfig"
source "board/ti/omap5_uevm/Kconfig"
source "board/ti/dra7xx/Kconfig"
source "board/ti/beagle_x15/Kconfig"

endif
12 changes: 6 additions & 6 deletions arch/arm/cpu/armv7/omap5/hw_data.c
Expand Up @@ -365,31 +365,31 @@ struct vcores_data dra752_volts = {
.mpu.value = VDD_MPU_DRA752,
.mpu.efuse.reg = STD_FUSE_OPP_VMIN_MPU_NOM,
.mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
.mpu.addr = TPS659038_REG_ADDR_SMPS12_MPU,
.mpu.addr = TPS659038_REG_ADDR_SMPS12,
.mpu.pmic = &tps659038,

.eve.value = VDD_EVE_DRA752,
.eve.efuse.reg = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
.eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
.eve.addr = TPS659038_REG_ADDR_SMPS45_EVE,
.eve.addr = TPS659038_REG_ADDR_SMPS45,
.eve.pmic = &tps659038,

.gpu.value = VDD_GPU_DRA752,
.gpu.efuse.reg = STD_FUSE_OPP_VMIN_GPU_NOM,
.gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
.gpu.addr = TPS659038_REG_ADDR_SMPS6_GPU,
.gpu.addr = TPS659038_REG_ADDR_SMPS6,
.gpu.pmic = &tps659038,

.core.value = VDD_CORE_DRA752,
.core.efuse.reg = STD_FUSE_OPP_VMIN_CORE_NOM,
.core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
.core.addr = TPS659038_REG_ADDR_SMPS7_CORE,
.core.addr = TPS659038_REG_ADDR_SMPS7,
.core.pmic = &tps659038,

.iva.value = VDD_IVA_DRA752,
.iva.efuse.reg = STD_FUSE_OPP_VMIN_IVA_NOM,
.iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
.iva.addr = TPS659038_REG_ADDR_SMPS8_IVA,
.iva.addr = TPS659038_REG_ADDR_SMPS8,
.iva.pmic = &tps659038,
};

Expand Down Expand Up @@ -593,7 +593,7 @@ const struct ctrl_ioregs ioregs_dra72x_es1 = {
.ctrl_ddr_ctrl_ext_0 = 0xA2000000,
};

void hw_data_init(void)
void __weak hw_data_init(void)
{
u32 omap_rev = omap_revision();

Expand Down
3 changes: 3 additions & 0 deletions arch/arm/cpu/armv7/omap5/prcm-regs.c
Expand Up @@ -376,6 +376,7 @@ struct omap_sys_ctrl_regs const omap5_ctrl = {

struct omap_sys_ctrl_regs const dra7xx_ctrl = {
.control_status = 0x4A002134,
.control_phy_power_usb = 0x4A002370,
.control_phy_power_sata = 0x4A002374,
.control_core_mac_id_0_lo = 0x4A002514,
.control_core_mac_id_0_hi = 0x4A002518,
Expand Down Expand Up @@ -800,6 +801,7 @@ struct prcm_regs const dra7xx_prcm = {
.cm_clkmode_dpll_dsp = 0x4a005234,
.cm_shadow_freq_config1 = 0x4a005260,
.cm_clkmode_dpll_gmac = 0x4a0052a8,
.cm_coreaon_usb_phy_core_clkctrl = 0x4a008640,
.cm_coreaon_usb_phy2_core_clkctrl = 0x4a008688,

/* cm1.mpu */
Expand Down Expand Up @@ -906,6 +908,7 @@ struct prcm_regs const dra7xx_prcm = {
.cm_gmac_gmac_clkctrl = 0x4a0093d0,
.cm_l3init_ocp2scp1_clkctrl = 0x4a0093e0,
.cm_l3init_ocp2scp3_clkctrl = 0x4a0093e8,
.cm_l3init_usb_otg_ss_clkctrl = 0x4a0093f0,

/* cm2.l4per */
.cm_l4per_clkstctrl = 0x4a009700,
Expand Down
2 changes: 1 addition & 1 deletion arch/arm/cpu/armv7/omap5/sdram.c
Expand Up @@ -513,7 +513,7 @@ const struct lpddr2_mr_regs mr_regs = {
.mr16 = MR16_REF_FULL_ARRAY
};

static void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr,
void __weak emif_get_ext_phy_ctrl_const_regs(u32 emif_nr,
const u32 **regs,
u32 *size)
{
Expand Down
1 change: 1 addition & 0 deletions arch/arm/include/asm/arch-am33xx/spl.h
Expand Up @@ -25,6 +25,7 @@
#else
#define BOOT_DEVICE_XIP 2
#define BOOT_DEVICE_NAND 5
#define BOOT_DEVICE_NAND_I2C 6
#if defined(CONFIG_AM33XX)
#define BOOT_DEVICE_MMC1 8
#define BOOT_DEVICE_MMC2 9 /* eMMC or daughter card */
Expand Down
12 changes: 6 additions & 6 deletions arch/arm/include/asm/arch-omap5/clock.h
Expand Up @@ -278,11 +278,11 @@

/* TPS659038 */
#define TPS659038_I2C_SLAVE_ADDR 0x58
#define TPS659038_REG_ADDR_SMPS12_MPU 0x23
#define TPS659038_REG_ADDR_SMPS45_EVE 0x2B
#define TPS659038_REG_ADDR_SMPS6_GPU 0x2F
#define TPS659038_REG_ADDR_SMPS7_CORE 0x33
#define TPS659038_REG_ADDR_SMPS8_IVA 0x37
#define TPS659038_REG_ADDR_SMPS12 0x23
#define TPS659038_REG_ADDR_SMPS45 0x2B
#define TPS659038_REG_ADDR_SMPS6 0x2F
#define TPS659038_REG_ADDR_SMPS7 0x33
#define TPS659038_REG_ADDR_SMPS8 0x37

/* TPS */
#define TPS62361_I2C_SLAVE_ADDR 0x60
Expand Down Expand Up @@ -314,7 +314,7 @@
*/
#define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC 31219

#ifdef CONFIG_DRA7XX
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
#define V_OSCK 20000000 /* Clock output from T2 */
#else
#define V_OSCK 19200000 /* Clock output from T2 */
Expand Down
4 changes: 2 additions & 2 deletions arch/arm/include/asm/arch-omap5/omap.h
Expand Up @@ -27,7 +27,7 @@
#define CONTROL_CORE_ID_CODE 0x4A002204
#define CONTROL_WKUP_ID_CODE 0x4AE0C204

#ifdef CONFIG_DRA7XX
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
#define CONTROL_ID_CODE CONTROL_WKUP_ID_CODE
#else
#define CONTROL_ID_CODE CONTROL_CORE_ID_CODE
Expand Down Expand Up @@ -163,7 +163,7 @@ struct s32ktimer {
* much larger) and do not, at this time, make use of the additional
* space.
*/
#ifdef CONFIG_DRA7XX
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
#define NON_SECURE_SRAM_START 0x40300000
#define NON_SECURE_SRAM_END 0x40380000 /* Not inclusive */
#else
Expand Down
3 changes: 3 additions & 0 deletions arch/arm/include/asm/omap_common.h
Expand Up @@ -540,13 +540,16 @@ extern struct prcm_regs const omap5_es2_prcm;
extern struct prcm_regs const omap4_prcm;
extern struct prcm_regs const dra7xx_prcm;
extern struct dplls const **dplls_data;
extern struct dplls dra7xx_dplls;
extern struct vcores_data const **omap_vcores;
extern const u32 sys_clk_array[8];
extern struct omap_sys_ctrl_regs const **ctrl;
extern struct omap_sys_ctrl_regs const omap4_ctrl;
extern struct omap_sys_ctrl_regs const omap5_ctrl;
extern struct omap_sys_ctrl_regs const dra7xx_ctrl;

extern struct pmic_data tps659038;

void hw_data_init(void);

const struct dpll_params *get_mpu_dpll_params(struct dplls const *);
Expand Down
5 changes: 5 additions & 0 deletions board/comelit/dig297/dig297.c
Expand Up @@ -133,6 +133,11 @@ int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}

void board_mmc_power_init(void)
{
twl4030_power_mmc_init(0);
}
#endif

#ifdef CONFIG_CMD_NET
Expand Down
7 changes: 7 additions & 0 deletions board/compulab/cm_t35/cm_t35.c
Expand Up @@ -382,6 +382,13 @@ int board_mmc_init(bd_t *bis)
}
#endif

#if defined(CONFIG_GENERIC_MMC)
void board_mmc_power_init(void)
{
twl4030_power_mmc_init(0);
}
#endif

#ifdef CONFIG_SYS_I2C_OMAP34XX
/*
* Routine: reset_net_chip
Expand Down
7 changes: 7 additions & 0 deletions board/corscience/tricorder/tricorder.c
Expand Up @@ -147,6 +147,13 @@ int board_mmc_init(bd_t *bis)
}
#endif

#if defined(CONFIG_GENERIC_MMC)
void board_mmc_power_init(void)
{
twl4030_power_mmc_init(0);
}
#endif

/*
* Routine: get_board_mem_timings
* Description: If we use SPL then there is no x-loader nor config header
Expand Down
7 changes: 7 additions & 0 deletions board/isee/igep00x0/igep00x0.c
Expand Up @@ -150,6 +150,13 @@ int board_mmc_init(bd_t *bis)
}
#endif

#if defined(CONFIG_GENERIC_MMC)
void board_mmc_power_init(void)
{
twl4030_power_mmc_init(0);
}
#endif

void set_fdt(void)
{
switch (gd->bd->bi_arch_number) {
Expand Down
7 changes: 7 additions & 0 deletions board/logicpd/omap3som/omap3logic.c
Expand Up @@ -128,6 +128,13 @@ int board_mmc_init(bd_t *bis)
}
#endif

#if defined(CONFIG_GENERIC_MMC)
void board_mmc_power_init(void)
{
twl4030_power_mmc_init(0);
}
#endif

#ifdef CONFIG_SMC911X
/* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */
static const u32 gpmc_lan92xx_config[] = {
Expand Down
5 changes: 5 additions & 0 deletions board/logicpd/zoom1/zoom1.c
Expand Up @@ -109,6 +109,11 @@ int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}

void board_mmc_power_init(void)
{
twl4030_power_mmc_init(0);
}
#endif

#ifdef CONFIG_CMD_NET
Expand Down
6 changes: 6 additions & 0 deletions board/matrix_vision/mvblx/mvblx.c
Expand Up @@ -94,6 +94,12 @@ int board_mmc_init(bd_t *bis)
omap_mmc_init(1, 0, 0, -1, -1);
return 0;
}

void board_mmc_power_init(void)
{
twl4030_power_mmc_init(0);
twl4030_power_mmc_init(1);
}
#endif

#if defined(CONFIG_CMD_NET)
Expand Down
6 changes: 6 additions & 0 deletions board/nokia/rx51/rx51.c
Expand Up @@ -659,3 +659,9 @@ int board_mmc_init(bd_t *bis)
omap_mmc_init(1, 0, 0, -1, -1);
return 0;
}

void board_mmc_power_init(void)
{
twl4030_power_mmc_init(0);
twl4030_power_mmc_init(1);
}
7 changes: 7 additions & 0 deletions board/overo/overo.c
Expand Up @@ -493,6 +493,13 @@ int board_mmc_init(bd_t *bis)
}
#endif

#if defined(CONFIG_GENERIC_MMC)
void board_mmc_power_init(void)
{
twl4030_power_mmc_init(0);
}
#endif

#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
Expand Down
5 changes: 5 additions & 0 deletions board/pandora/pandora.c
Expand Up @@ -126,4 +126,9 @@ int board_mmc_init(bd_t *bis)
{
return omap_mmc_init(0, 0, 0, -1, -1);
}

void board_mmc_power_init(void)
{
twl4030_power_mmc_init(0);
}
#endif
9 changes: 0 additions & 9 deletions board/siemens/common/board.c
Expand Up @@ -96,15 +96,6 @@ const struct dpll_params *get_dpll_ddr_params(void)
return &dpll_ddr;
}

#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
omap_nand_switch_ecc(1, 8);

return 0;
}
#endif

#ifndef CONFIG_SPL_BUILD
#if defined(BOARD_DFU_BUTTON_GPIO)
/*
Expand Down

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