Join GitHub today
GitHub is home to over 40 million developers working together to host and review code, manage projects, and build software together.Sign up
One long-standing issue with the workflow with chisel-testers was that we always re-ran the chisel generator. Ideally, you'd be able to re-run all your unit tests on your top level design. We had some workarounds for this (e.g. saving the peeks/expects and generating a verilog testbench that checked the original behavior was precisely reproduced), but they weren't great.
I think the fundamental issue is that we want to be able to introspect on the module. Is there a good way to retain scala objects used to produce a circuit so it can be reused after a compilation run?
Some use cases: