@ucb-bar

UC Berkeley Architecture Research

Pinned repositories

  1. rocket-chip

    Rocket Chip Generator

    Scala 230 121

  2. chisel3

    Chisel 3

    Scala 75 36

  3. chisel-tutorial

    chisel tutorial exercises and answers

    Scala 62 43

  4. firrtl

    Flexible Intermediate Representation for RTL

    Scala 36 21

  5. chisel-template

    A template project for beginning new Chisel work

    Scala 6 2

  6. chisel-testers

    Provides various testers for chisel users

    Scala 5 9

  • Useful utilities for BAR projects

    Scala 1 Updated Feb 21, 2017
  • A Library of Chisel3 Tools for Digital Signal Processing

    Scala 4 1 Updated Feb 21, 2017
  • Rocket Chip Generator

    scala rocket-chip chip-generator chisel riscv rtl

    Scala 230 121 Updated Feb 20, 2017
  • Flexible Intermediate Representation for RTL

    Scala 36 21 Updated Feb 19, 2017
  • Berkeley Out-of-Order Machine

    Scala 67 23 Updated Feb 18, 2017
  • Chisel 3

    scala chip-generator chisel rtl chisel3 firrtl verilog

    Scala 75 36 Updated Feb 17, 2017
  • Provides various testers for chisel users

    Scala 5 9 Updated Feb 17, 2017
  • A scala based simulator for circuits described by a LoFirrtl file

    Scala 2 4 Updated Feb 14, 2017
  • Scala 20 9 Updated Feb 11, 2017
  • Palmer's VLSI scripts

    Shell 2 4 Updated Feb 10, 2017
  • SoftFloat release 3

    C 9 3 Updated Feb 11, 2017
  • TestFloat release 3

    C 8 2 Updated Feb 11, 2017
  • educational microarchitectures for risc-v isa

    Scala 102 35 Updated Feb 11, 2017
  • C 6 5 Updated Feb 9, 2017
  • Scala 1 3 Updated Feb 8, 2017
  • Support for Rocket Chip on Zynq FPGAs

    Tcl 65 39 Updated Feb 9, 2017
  • chisel tutorial exercises and answers

    Scala 62 40 Updated Feb 8, 2017
  • A Scala library for Context-Dependent Evironments

    Scala 2 5 Updated Jan 27, 2017
  • Memory System Microbenchmarks

    C 9 3 Updated Jan 25, 2017
  • My FIRRTL pass manager, which comes with a collection of FIRRTL passes

    Shell Updated Jan 20, 2017
  • Mirror of Chisel3 Github wiki https://github.com/ucb-bar/chisel3/wiki

    Updated Jan 7, 2017
  • A template project for beginning new Chisel work

    Scala 6 2 Updated Dec 13, 2016
  • RISC-V Torture Test

    Scala 6 3 Updated Dec 12, 2016
  • C 4 Updated Nov 24, 2016
  • Scala 375 103 Updated Nov 17, 2016
  • C 1 Updated Oct 25, 2016
  • 3 Updated Oct 12, 2016
  • prebuilt images for zedboard zynq fpga

    2 5 Updated Oct 11, 2016
  • 1 Updated Oct 11, 2016
  • OpenSoC Fabric - A Network-On-Chip Generator

    Scala 9 19 Updated Sep 14, 2016