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vTLB: Use PAE format on 64bit hosts.
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@udosteinberg
udosteinberg committed Aug 9, 2013
1 parent 3ad8f0c commit 1821df4
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Showing 3 changed files with 40 additions and 31 deletions.
9 changes: 7 additions & 2 deletions include/vtlb.hpp
View file
Expand Up @@ -4,7 +4,7 @@
* Copyright (C) 2009-2011 Udo Steinberg <udo@hypervisor.org>
* Economic rights: Technische Universitaet Dresden (Germany)
*
* Copyright (C) 2012 Udo Steinberg, Intel Corporation.
* Copyright (C) 2012-2013 Udo Steinberg, Intel Corporation.
*
* This file is part of the NOVA microhypervisor.
*
Expand All @@ -25,11 +25,15 @@

class Exc_regs;

#ifdef __i386__
class Vtlb : public Pte<Vtlb, uint32, 2, 10, false>
#else
class Vtlb : public Pte<Vtlb, uint64, 3, 9, false>
#endif
{
private:
ALWAYS_INLINE
inline bool global() const { return val & TLB_G; }
inline bool mark() const { return val & TLB_M; }

ALWAYS_INLINE
inline bool frag() const { return val & TLB_F; }
Expand Down Expand Up @@ -57,6 +61,7 @@ class Vtlb : public Pte<Vtlb, uint32, 2, 10, false>
TLB_S = 1UL << 7,
TLB_G = 1UL << 8,
TLB_F = 1UL << 9,
TLB_M = 1UL << 10,

PTE_P = TLB_P,
PTE_S = TLB_S,
Expand Down
34 changes: 19 additions & 15 deletions src/regs.cpp
View file
Expand Up @@ -4,7 +4,7 @@
* Copyright (C) 2009-2011 Udo Steinberg <udo@hypervisor.org>
* Economic rights: Technische Universitaet Dresden (Germany)
*
* Copyright (C) 2012 Udo Steinberg, Intel Corporation.
* Copyright (C) 2012-2013 Udo Steinberg, Intel Corporation.
*
* This file is part of the NOVA microhypervisor.
*
Expand Down Expand Up @@ -111,14 +111,14 @@ mword Exc_regs::linear_address (mword val) const
template <typename T>
mword Exc_regs::cr0_set() const
{
mword msk = 0;
mword set = 0;

if (!nst_on)
msk |= Cpu::CR0_PG | Cpu::CR0_WP | Cpu::CR0_PE;
set |= Cpu::CR0_PG | Cpu::CR0_WP | Cpu::CR0_PE;
if (!fpu_on)
msk |= Cpu::CR0_TS;
set |= Cpu::CR0_TS;

return T::fix_cr0_set | msk;
return T::fix_cr0_set | set;
}

template <typename T>
Expand All @@ -130,23 +130,27 @@ mword Exc_regs::cr0_msk() const
template <typename T>
mword Exc_regs::cr4_set() const
{
mword msk = 0;

if (!nst_on)
msk |= Cpu::CR4_PSE;
mword set = nst_on ? 0 :
#ifdef __i386__
Cpu::CR4_PSE;
#else
Cpu::CR4_PSE | Cpu::CR4_PAE;
#endif

return T::fix_cr4_set | msk;
return T::fix_cr4_set | set;
}

template <typename T>
mword Exc_regs::cr4_msk() const
{
mword msk = 0;

if (!nst_on)
msk |= Cpu::CR4_PGE | Cpu::CR4_PAE;
mword clr = nst_on ? 0 :
#ifdef __i386__
Cpu::CR4_PGE | Cpu::CR4_PAE;
#else
Cpu::CR4_PGE;
#endif

return T::fix_cr4_clr | cr4_set<T>() | msk;
return T::fix_cr4_clr | clr | cr4_set<T>();
}

template <typename T>
Expand Down
28 changes: 14 additions & 14 deletions src/vtlb.cpp
View file
Expand Up @@ -4,7 +4,7 @@
* Copyright (C) 2009-2011 Udo Steinberg <udo@hypervisor.org>
* Economic rights: Technische Universitaet Dresden (Germany)
*
* Copyright (C) 2012 Udo Steinberg, Intel Corporation.
* Copyright (C) 2012-2013 Udo Steinberg, Intel Corporation.
*
* This file is part of the NOVA microhypervisor.
*
Expand Down Expand Up @@ -35,12 +35,12 @@ size_t Vtlb::gwalk (Exc_regs *regs, mword gla, mword &gpa, mword &attr, mword &e
bool pge = regs->cr4_shadow & Cpu::CR4_PGE;
bool wp = regs->cr0_shadow & Cpu::CR0_WP;

unsigned lev = max();
unsigned lev = 2;

for (uint32 e, *pte= reinterpret_cast<uint32 *>(regs->cr3_shadow & ~PAGE_MASK);; pte = reinterpret_cast<uint32 *>(e & ~PAGE_MASK)) {

unsigned shift = --lev * bpl() + PAGE_BITS;
pte += gla >> shift & ((1UL << bpl()) - 1);
unsigned shift = --lev * 10 + PAGE_BITS;
pte += gla >> shift & ((1UL << 10) - 1);

if (User::peek (pte, e) != ~0UL) {
gpa = reinterpret_cast<Paddr>(pte);
Expand Down Expand Up @@ -72,8 +72,8 @@ size_t Vtlb::gwalk (Exc_regs *regs, mword gla, mword &gpa, mword &attr, mword &e

attr |= e & TLB_UC;

if (EXPECT_TRUE (pge))
attr |= e & TLB_G;
if (EXPECT_TRUE (pge) && (e & TLB_G))
attr |= TLB_M;

size_t size = 1UL << shift;

Expand Down Expand Up @@ -144,17 +144,17 @@ Vtlb::Reason Vtlb::miss (Exc_regs *regs, mword virt, mword &error)

if (lev) {

if (size < 1UL << shift) {
if (lev == 2 || size < 1UL << shift) {

if (tlb->super())
tlb->val = static_cast<typeof tlb->val>(Buddy::ptr_to_phys (new Vtlb) | TLB_G | TLB_A | TLB_U | TLB_W | TLB_P);
tlb->val = static_cast<typeof tlb->val>(Buddy::ptr_to_phys (new Vtlb) | (lev == 2 ? 0 : TLB_A | TLB_U | TLB_W) | TLB_M | TLB_P);

else if (!tlb->present()) {
static_cast<Vtlb *>(Buddy::phys_to_ptr (tlb->addr()))->flush_ptab (tlb->global());
tlb->val |= TLB_G | TLB_P;
static_cast<Vtlb *>(Buddy::phys_to_ptr (tlb->addr()))->flush_ptab (tlb->mark());
tlb->val |= TLB_M | TLB_P;
}

tlb->val &= static_cast<typeof tlb->val>(attr | ~TLB_G);
tlb->val &= static_cast<typeof tlb->val>(attr | ~TLB_M);
tlb->val |= static_cast<typeof tlb->val>(attr & TLB_F);

continue;
Expand All @@ -180,9 +180,9 @@ void Vtlb::flush_ptab (bool full)
continue;

if (EXPECT_FALSE (full))
e->val |= TLB_G;
e->val |= TLB_M;

else if (EXPECT_FALSE (e->global()))
else if (EXPECT_FALSE (e->mark()))
continue;

e->val &= ~TLB_P;
Expand All @@ -204,7 +204,7 @@ void Vtlb::flush (mword virt)
if (l && !e->super() && !e->frag())
continue;

e->val |= TLB_G;
e->val |= TLB_M;
e->val &= ~TLB_P;

Counter::print<1,16> (++Counter::vtlb_flush, Console_vga::COLOR_LIGHT_RED, SPN_VFL);
Expand Down

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