Update rt.conf for release/public-v2

[climbfuji]

Description

We need to update rt.conf in the release/public-v2 branch to only run tests that are relevant for the SRW App v1.0 release.

Currently, rt.conf contains:

COMPILE | CCPP=Y SUITES=FV3_GFS_2017                                                                                                     | standard    | wcoss_cray     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017                                                                                                     | standard    | wcoss_dell_p3  | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017                                                                                                     | standard    | hera.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017                                                                                                     | standard    | gaea.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017                                                                                                     | standard    | jet.intel      | fv3         |

RUN     | fv3_ccpp_control                                                                                                               | standard    |                | fv3         |
RUN     | fv3_ccpp_decomp                                                                                                                | standard    |                |             |
RUN     | fv3_ccpp_2threads                                                                                                              | standard    |                |             |
RUN     | fv3_ccpp_restart                                                                                                               | standard    |                | fv3         |
RUN     | fv3_ccpp_read_inc                                                                                                              | standard    |                | fv3         |
RUN     | fv3_ccpp_wrtGauss_netcdf_esmf                                                                                                  | standard    |                | fv3         |
RUN     | fv3_ccpp_wrtGauss_netcdf                                                                                                       | standard    |                | fv3         |
RUN     | fv3_ccpp_wrtGlatlon_netcdf                                                                                                     | standard    |                | fv3         |
RUN     | fv3_ccpp_wrtGauss_nemsio                                                                                                       | standard    |                | fv3         |
RUN     | fv3_ccpp_wrtGauss_nemsio_c192                                                                                                  | standard    |                | fv3         |
RUN     | fv3_ccpp_stochy                                                                                                                | standard    |                | fv3         |
RUN     | fv3_ccpp_iau                                                                                                                   | standard    | wcoss_cray     | fv3         |
RUN     | fv3_ccpp_iau                                                                                                                   | standard    | wcoss_dell_p3  | fv3         |
RUN     | fv3_ccpp_iau                                                                                                                   | standard    | hera.intel     | fv3         |
RUN     | fv3_ccpp_ca                                                                                                                    | standard    | hera.intel     | fv3         |
# temporarily disabled for gaea.intel (intel18): gives different results when creating baseline and verifying against it
#RUN     | fv3_ccpp_iau                                                                                                                   | standard    | gaea.intel     | fv3         |
RUN     | fv3_ccpp_iau                                                                                                                   | standard    | jet.intel      | fv3         |
RUN     | fv3_ccpp_lheatstrg                                                                                                             | standard    |                | fv3         |

COMPILE | CCPP=Y SUITES=FV3_GFS_2017,FV3_GFS_2017_gfdlmp WW3=Y                                                                           | standard    | wcoss_cray     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017,FV3_GFS_2017_gfdlmp WW3=Y                                                                           | standard    | wcoss_dell_p3  | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017,FV3_GFS_2017_gfdlmp WW3=Y                                                                           | standard    | hera.intel     | fv3         |
RUN     | fv3_ccpp_gfdlmprad                                                                                                             | standard    | wcoss_cray     | fv3         |
RUN     | fv3_ccpp_gfdlmprad                                                                                                             | standard    | wcoss_dell_p3  | fv3         |
RUN     | fv3_ccpp_gfdlmprad                                                                                                             | standard    | hera.intel     | fv3         |
RUN     | fv3_ccpp_gfdlmprad_atmwav                                                                                                      | standard    | wcoss_cray     | fv3         |
RUN     | fv3_ccpp_gfdlmprad_atmwav                                                                                                      | standard    | wcoss_dell_p3  | fv3         |
RUN     | fv3_ccpp_gfdlmprad_atmwav                                                                                                      | standard    | hera.intel     | fv3         |
RUN     | fv3_ccpp_wrtGauss_nemsio_c768                                                                                                  | standard    | hera.intel     | fv3         |
###RUN     | fv3_ccpp_wrtGauss_nemsio_c768                                                                                                  | standard    | wcoss_cray     | fv3         |
###RUN     | fv3_ccpp_wrtGauss_nemsio_c768                                                                                                  | standard    | wcoss_dell_p3  | fv3         |

COMPILE | CCPP=Y SUITES=FV3_GFS_2017_fv3wam 32BIT=Y MULTI_GASES=Y                                                                   | standard    | wcoss_cray     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_fv3wam    32BIT=Y MULTI_GASES=Y                                                                | standard    | wcoss_dell_p3  | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_fv3wam   32BIT=Y MULTI_GASES=Y                                                                                              | standard    | hera.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_fv3wam    32BIT=Y MULTI_GASES=Y                                                                | standard    | gaea.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_fv3wam    32BIT=Y MULTI_GASES=Y                                                                | standard    | jet.intel      | fv3         |
RUN     | fv3_ccpp_multigases                                                                                                         | standard    |                | fv3         |

COMPILE | CCPP=Y SUITES=FV3_GFS_2017,FV3_GFS_2017_stretched 32BIT=Y                                                                      | standard    | wcoss_cray     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017,FV3_GFS_2017_stretched 32BIT=Y                                                                      | standard    | wcoss_dell_p3  | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017,FV3_GFS_2017_stretched 32BIT=Y                                                                      | standard    | hera.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017,FV3_GFS_2017_stretched 32BIT=Y                                                                      | standard    | gaea.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017,FV3_GFS_2017_stretched 32BIT=Y                                                                      | standard    | jet.intel      | fv3         |

RUN     | fv3_ccpp_control_32bit                                                                                                         | standard    |                | fv3         |
RUN     | fv3_ccpp_stretched                                                                                                             | standard    |                | fv3         |
RUN     | fv3_ccpp_stretched_nest                                                                                                        | standard    |                | fv3         |

COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp_regional,FV3_GFS_2017_gfdlmp_regional_c768 32BIT=Y                                           | standard    | wcoss_cray     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp_regional,FV3_GFS_2017_gfdlmp_regional_c768 32BIT=Y                                           | standard    | wcoss_dell_p3  | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp_regional,FV3_GFS_2017_gfdlmp_regional_c768 32BIT=Y                                           | standard    | hera.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp_regional,FV3_GFS_2017_gfdlmp_regional_c768 32BIT=Y                                           | standard    | gaea.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp_regional,FV3_GFS_2017_gfdlmp_regional_c768 32BIT=Y                                           | standard    | jet.intel      | fv3         |

RUN     | fv3_ccpp_regional_control                                                                                                      | standard    |                | fv3         |
RUN     | fv3_ccpp_regional_restart                                                                                                      | standard    |                | fv3         | fv3_ccpp_regional_control
RUN     | fv3_ccpp_regional_quilt                                                                                                        | standard    |                | fv3         |
RUN     | fv3_ccpp_regional_c768                                                                                                         | standard    | wcoss_dell_p3  | fv3         |
RUN     | fv3_ccpp_regional_c768                                                                                                         | standard    | hera.intel     | fv3         |
RUN     | fv3_ccpp_regional_c768                                                                                                         | standard    | gaea.intel     | fv3         |
RUN     | fv3_ccpp_regional_c768                                                                                                         | standard    | jet.intel      | fv3         |

COMPILE | CCPP=Y SUITES=FV3_GFS_2017,FV3_GFS_2017_stretched 32BIT=Y DEBUG=Y                                                              | standard    | wcoss_cray     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017,FV3_GFS_2017_stretched 32BIT=Y DEBUG=Y                                                              | standard    | wcoss_dell_p3  | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017,FV3_GFS_2017_stretched 32BIT=Y DEBUG=Y                                                              | standard    | hera.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017,FV3_GFS_2017_stretched 32BIT=Y DEBUG=Y                                                              | standard    | gaea.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017,FV3_GFS_2017_stretched 32BIT=Y DEBUG=Y                                                              | standard    | jet.intel      | fv3         |

RUN     | fv3_ccpp_control_debug                                                                                                         | standard    |                | fv3         |
RUN     | fv3_ccpp_stretched_nest_debug                                                                                                  | standard    |                | fv3         |

COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_GFS_2017_gfdlmp_noahmp                                                                   | standard    | wcoss_cray     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_GFS_2017_gfdlmp_noahmp                                                                   | standard    | wcoss_dell_p3  | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_GFS_2017_gfdlmp_noahmp                                                                   | standard    | hera.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_GFS_2017_gfdlmp_noahmp                                                                   | standard    | gaea.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_GFS_2017_gfdlmp_noahmp                                                                   | standard    | jet.intel      | fv3         |

RUN     | fv3_ccpp_gfdlmp                                                                                                                | standard    |                | fv3         |
RUN     | fv3_ccpp_gfdlmprad_gwd                                                                                                         | standard    |                | fv3         |
RUN     | fv3_ccpp_gfdlmprad_noahmp                                                                                                      | standard    |                | fv3         |
RUN     | fv3_ccpp_gfdlmp_hwrfsas                                                                                                        | standard    |                | fv3         |

COMPILE | CCPP=Y SUITES=FV3_GFS_2017_csawmgshoc,FV3_GFS_2017_csawmg,FV3_GFS_2017_satmedmf,FV3_GFS_2017_satmedmfq                         | standard    | wcoss_cray     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_csawmgshoc,FV3_GFS_2017_csawmg,FV3_GFS_2017_satmedmf,FV3_GFS_2017_satmedmfq                         | standard    | wcoss_dell_p3  | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_csawmgshoc,FV3_GFS_2017_csawmg,FV3_GFS_2017_satmedmf,FV3_GFS_2017_satmedmfq                         | standard    | hera.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_csawmgshoc,FV3_GFS_2017_csawmg,FV3_GFS_2017_satmedmf,FV3_GFS_2017_satmedmfq                         | standard    | gaea.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_csawmgshoc,FV3_GFS_2017_csawmg,FV3_GFS_2017_satmedmf,FV3_GFS_2017_satmedmfq                         | standard    | jet.intel      | fv3         |
#RUN     | fv3_ccpp_csawmgshoc                                                                                                            | standard    |                | fv3         |
#RUN     | fv3_ccpp_csawmg3shoc127                                                                                                        | standard    |                | fv3         |
RUN     | fv3_ccpp_csawmg                                                                                                                | standard    |                | fv3         |
RUN     | fv3_ccpp_satmedmf                                                                                                              | standard    |                | fv3         |
RUN     | fv3_ccpp_satmedmfq                                                                                                             | standard    |                | fv3         |

COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_CPT_v0,FV3_GSD_v0,FV3_GFS_v15_thompson,FV3_RAP,FV3_HRRR,FV3_RRFS_v1beta 32BIT=Y          | standard    | wcoss_cray     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_CPT_v0,FV3_GSD_v0,FV3_GFS_v15_thompson,FV3_RAP,FV3_HRRR,FV3_RRFS_v1beta 32BIT=Y          | standard    | wcoss_dell_p3  | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_CPT_v0,FV3_GSD_v0,FV3_GFS_v15_thompson,FV3_RAP,FV3_HRRR,FV3_RRFS_v1beta 32BIT=Y          | standard    | hera.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_CPT_v0,FV3_GSD_v0,FV3_GFS_v15_thompson,FV3_RAP,FV3_HRRR,FV3_RRFS_v1beta 32BIT=Y          | standard    | gaea.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_CPT_v0,FV3_GSD_v0,FV3_GFS_v15_thompson,FV3_RAP,FV3_HRRR,FV3_RRFS_v1beta 32BIT=Y          | standard    | jet.intel      | fv3         |

RUN     | fv3_ccpp_gfdlmp_32bit                                                                                                          | standard    |                | fv3         |
RUN     | fv3_ccpp_gfdlmprad_32bit_post                                                                                                  | standard    | wcoss_cray     | fv3         |
RUN     | fv3_ccpp_gfdlmprad_32bit_post                                                                                                  | standard    | wcoss_dell_p3  | fv3         |
RUN     | fv3_ccpp_gfdlmprad_32bit_post                                                                                                  | standard    | hera.intel     | fv3         |
RUN     | fv3_ccpp_cpt                                                                                                                   | standard    |                | fv3         |
RUN     | fv3_ccpp_gsd                                                                                                                   | standard    |                | fv3         |
# Input data for RAP and HRRR runs only on hera (drag suite)
RUN     | fv3_ccpp_rap                                                                                                                   | standard    | hera.intel     | fv3         |
RUN     | fv3_ccpp_hrrr                                                                                                                  | standard    | hera.intel     | fv3         |
RUN     | fv3_ccpp_thompson                                                                                                              | standard    |                | fv3         |
RUN     | fv3_ccpp_thompson_no_aero                                                                                                      | standard    |                | fv3         |
RUN     | fv3_ccpp_rrfs_v1beta                                                                                                           | standard    |                | fv3         |

#######################################################################################################################################################################################
# CCPP PROD tests                                                                                                                                                                     #
#######################################################################################################################################################################################

COMPILE | CCPP=Y SUITES=FV3_GFS_v15p2,FV3_GFS_v16beta,FV3_GFS_v15p2_RRTMGP,FV3_GFS_v16beta_RRTMGP                                        | standard    | hera.intel     | fv3         |

RUN     | fv3_ccpp_gfs_v15p2                                                                                                             | standard    | hera.intel     | fv3         |
RUN     | fv3_ccpp_gfs_v16beta                                                                                                           | standard    | hera.intel     | fv3         |
RUN     | fv3_ccpp_gfs_v15p2_RRTMGP                                                                                                      | standard    | hera.intel     | fv3         |
RUN     | fv3_ccpp_gfs_v16beta_RRTMGP                                                                                                    | standard    | hera.intel     | fv3         |

#######################################################################################################################################################################################
# CCPP DEBUG tests                                                                                                                                                                     #
#######################################################################################################################################################################################

COMPILE | CCPP=Y SUITES=FV3_GFS_v15p2,FV3_GFS_v16beta,FV3_GFS_v15p2_RRTMGP,FV3_GFS_v16beta_RRTMGP DEBUG=Y                                | standard    | hera.intel     | fv3         |

RUN     | fv3_ccpp_gfs_v15p2_debug                                                                                                       | standard    | hera.intel     | fv3         |
RUN     | fv3_ccpp_gfs_v16beta_debug                                                                                                     | standard    | hera.intel     | fv3         |
RUN     | fv3_ccpp_gfs_v15p2_RRTMGP_debug                                                                                                | standard    | hera.intel     | fv3         |
RUN     | fv3_ccpp_gfs_v16beta_RRTMGP_debug                                                                                              | standard    | hera.intel     | fv3         |

COMPILE | CCPP=Y SUITES=FV3_GSD_v0,FV3_GFS_v15_thompson,FV3_RRFS_v1beta 32BIT=Y DEBUG=Y                                                  | standard    | wcoss_cray     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GSD_v0,FV3_GFS_v15_thompson,FV3_RRFS_v1beta 32BIT=Y DEBUG=Y                                                  | standard    | wcoss_dell_p3  | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GSD_v0,FV3_GFS_v15_thompson,FV3_RRFS_v1beta 32BIT=Y DEBUG=Y                                                  | standard    | hera.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GSD_v0,FV3_GFS_v15_thompson,FV3_RRFS_v1beta 32BIT=Y DEBUG=Y                                                  | standard    | gaea.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GSD_v0,FV3_GFS_v15_thompson,FV3_RRFS_v1beta 32BIT=Y DEBUG=Y                                                  | standard    | jet.intel      | fv3         |

RUN     | fv3_ccpp_gsd_debug                                                                                                             | standard    |                | fv3         |
RUN     | fv3_ccpp_gsd_diag3d_debug                                                                                                      | standard    |                | fv3         |
RUN     | fv3_ccpp_thompson_debug                                                                                                        | standard    |                | fv3         |
RUN     | fv3_ccpp_thompson_no_aero_debug                                                                                                | standard    |                | fv3         |
#RUN     | fv3_ccpp_rrfs_v1beta_debug                                                                                                     | standard    |                | fv3         |
#######################################################################################################################################################################################
#######################################################################################################################################################################################
COMPILE | CCPP=Y SUITES=FV3_GFS_v16_csawmg                                                                                               | standard    | wcoss_cray     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_v16_csawmg                                                                                               | standard    | wcoss_dell_p3  | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_v16_csawmg                                                                                               | standard    | hera.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_v16_csawmg                                                                                               | standard    | gaea.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_v16_csawmg                                                                                               | standard    | jet.intel      | fv3         |

RUN     | fv3_ccpp_gfsv16_csawmg                                                                                                         | standard    |                | fv3         |
RUN     | fv3_ccpp_gfsv16_csawmgt                                                                                                        | standard    |                | fv3         |
#######################################################################################################################################################################################
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_GFS_2017_gfdlmp_noahmp,FV3_GFS_v16beta_flake                                             | standard    | wcoss_cray     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_GFS_2017_gfdlmp_noahmp,FV3_GFS_v16beta_flake                                             | standard    | wcoss_dell_p3  | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_GFS_2017_gfdlmp_noahmp,FV3_GFS_v16beta_flake                                             | standard    | hera.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_GFS_2017_gfdlmp_noahmp,FV3_GFS_v16beta_flake                                             | standard    | gaea.intel     | fv3         |
COMPILE | CCPP=Y SUITES=FV3_GFS_2017_gfdlmp,FV3_GFS_2017_gfdlmp_noahmp,FV3_GFS_v16beta_flake                                             | standard    | jet.intel      | fv3         |

RUN     | fv3_ccpp_gocart_clm                                                                                                            | standard    |                | fv3         |

RUN     | fv3_ccpp_gfs_v16beta_flake                                                                                                     | standard    |                | fv3         |

[climbfuji]

We also need to decide on which platforms we want to run those tests. I suggest all platforms that are identified as preconfigured (level-1) platforms for the UFS SRW App 1.0 release.

[climbfuji]

Closed via #205