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phy: rockchip-snps-pcie3: update fw when init
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This fw fix some RX issue:
1. connect detect error;
2. transfer error in ssd huge data write(more than 10GB).

Signed-off-by: default avatarKever Yang <kever.yang@rock-chips.com>
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unifreq committed Feb 15, 2023
1 parent 81da234 commit 1c9dcaf
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Showing 2 changed files with 8,221 additions and 2 deletions.
31 changes: 29 additions & 2 deletions drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@

/* Register for RK3568 */
#define GRF_PCIE30PHY_CON1 0x4
#define GRF_PCIE30PHY_CON4 0x10
#define GRF_PCIE30PHY_CON6 0x18
#define GRF_PCIE30PHY_CON9 0x24
#define GRF_PCIE30PHY_DA_OCM (BIT(15) | BIT(31))
Expand Down Expand Up @@ -63,6 +64,10 @@ struct rockchip_p3phy_ops {
int (*phy_init)(struct rockchip_p3phy_priv *priv);
};

static u16 phy_fw[] = {
#include "phy-rockchip-snps-pcie3.fw"
};

static int rockchip_p3phy_set_mode(struct phy *phy, enum phy_mode mode, int submode)
{
struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy);
Expand Down Expand Up @@ -112,16 +117,38 @@ static int rockchip_p3phy_rk3568_init(struct rockchip_p3phy_priv *priv)
GRF_PCIE30PHY_WR_EN & ~RK3568_BIFURCATION_LANE_0_1);
}

regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON4,
(0x0 << 14) | (0x1 << (14 + 16))); //sdram_ld_done
regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON4,
(0x0 << 13) | (0x1 << (13 + 16))); //sdram_bypass

reset_control_deassert(priv->p30phy);

ret = regmap_read_poll_timeout(priv->phy_grf,
GRF_PCIE30PHY_STATUS0,
reg, SRAM_INIT_DONE(reg),
0, 500);
if (ret)
if (ret) {
dev_err(&priv->phy->dev, "%s: lock failed 0x%x, check input refclk and power supply\n",
__func__, reg);
return ret;
return ret;
}

regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9,
(0x3 << 8) | (0x3 << (8 + 16))); //map to access sram

for (int i = 0; i < 8192; i++)
writel(phy_fw[i], priv->mmio + (i<<2));

regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9,
(0x0 << 8) | (0x3 << (8 + 16)));

regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON4,
(0x1 << 14) | (0x1 << (14 + 16))); //sdram_ld_done

dev_info(&priv->phy->dev, "p3phy (fw-d54d0eb) initialized\n");

return 0;
}

static const struct rockchip_p3phy_ops rk3568_ops = {
Expand Down

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