plat/common: Increase granularity of hardcoded legacy high memory

To ensure compatibility with boot protocols that do report the
BIOS System Memory region as a reserved region, split the memory
region inserted by `ukplat_memregion_list_insert_legacy_hi_mem`
into two memory region descriptors: one to contain known memory
holes (e.g. VGA Text Mode framebuffer) and one to contain the
previously mentioned BIOS System Memory region. The former will
have read/write permissions to ensure that zones like the VGA
framebuffer or certain PCI BARs mapped by the BIOS are writable,
while the latter will only have read permissions to ensure
compatibility with other boot protocols.

Signed-off-by: Sergiu Moga <sergiu@unikraft.io>

plat/common/include/uk/plat/common/memory.h

@@ -114,28 +114,47 @@ ukplat_memregion_list_insert(struct ukplat_memregion_list *list,
 }
 
 #if defined(__X86_64__)
-#define	X86_HI_MEM_START		0xA0000
-#define X86_HI_MEM_LEN			0x60000
+#define	X86_HI_MEM_START		0xA0000UL
+#define X86_HI_MEM_LEN			0x40000UL
+
+#define X86_BIOS_ROM_START		0xE0000UL
+#define X86_BIOS_ROM_LEN		0x20000UL
 
 static inline int
 ukplat_memregion_list_insert_legacy_hi_mem(struct ukplat_memregion_list *list)
 {
-	struct ukplat_memregion_desc mrd = {0};
+	int rc;
 
 	/* Note that we are mapping it as writable as well to cope with the
 	 * potential existence of the VGA framebuffer/SMM shadow memory.
-	 * This is fine, as writes to the mapped BIOS ROM in non-SMM are
-	 * ignored by the MCH once the BIOS gets towards the end of POST
-	 * by writing PCI config cycles to Programmable Attribute Map
-	 * registers mapped as a PCI device.
 	 */
-	mrd.vbase = (__vaddr_t)X86_HI_MEM_START;
-	mrd.pbase = (__paddr_t)X86_HI_MEM_START;
-	mrd.len = X86_HI_MEM_LEN;
-	mrd.type = UKPLAT_MEMRT_RESERVED;
-	mrd.flags = UKPLAT_MEMRF_READ | UKPLAT_MEMRF_WRITE | UKPLAT_MEMRF_MAP;
-
-	return ukplat_memregion_list_insert(list, &mrd);
+	rc = ukplat_memregion_list_insert(list,
+			&(struct ukplat_memregion_desc){
+				.vbase = X86_HI_MEM_START,
+				.pbase = X86_HI_MEM_START,
+				.len   = X86_HI_MEM_LEN,
+				.type  = UKPLAT_MEMRT_RESERVED,
+				.flags = UKPLAT_MEMRF_READ  |
+					 UKPLAT_MEMRF_WRITE |
+					 UKPLAT_MEMRF_MAP,
+			});
+	if (unlikely(rc < 0))
+		return rc;
+
+	/* Keep compatiblity with other possible reports of reserved memory
+	 * regions of this area and mark the BIOS System Memory as read-only.
+	 */
+	rc = ukplat_memregion_list_insert(list,
+			&(struct ukplat_memregion_desc){
+				.vbase = X86_BIOS_ROM_START,
+				.pbase = X86_BIOS_ROM_START,
+				.len   = X86_BIOS_ROM_LEN,
+				.type  = UKPLAT_MEMRT_RESERVED,
+				.flags = UKPLAT_MEMRF_READ  |
+					 UKPLAT_MEMRF_MAP,
+			});
+	if (unlikely(rc < 0))
+		return rc;
 }
 
 #if defined(CONFIG_HAVE_SMP)