machine-code-decoder

The first project implemented for the Computer Architecture course. Decoding and evaluation of hexadecimal machine code, implemented in Assembly x86 (AT&T).

The decoder receives as input hexadecimal instructions (simple arithmetic expressions in Polish postfix notation) as the machine code for an imaginary processor and outputs the evaluated expression. Implemented in 4 parts:

• task 1: decoding the input
• task 2: evaluating expressions without variables
• task 3: evaluating expressions with variables
• task 4: adapting the code for simple operations with matrices