ARM: dts: VAR-SOM-MX6: force enet_clk to 125 MHz

This aligns the enet_clk to the one from KSZ9031, also fixing the
Ethernet behaviour when the SoM mounts iMX6QP.

Signed-off-by: Pierluigi Passaro <pierluigi.p@variscite.com>

arch/arm/boot/dts/imx6qdl-var-som.dtsi

@@ -266,6 +266,8 @@
 	phy-reset-gpios = <&gpio1 25 0>;
 	phy-reset-duration=<100>;
 	phy-reset-on-resume;
+	assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF>;
+	assigned-clock-rates = <125000000>;
 	status = "okay";
 };