New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

FF without reset capability inside CLB #2417

Open

WazaAbdulkadir opened this issue Oct 11, 2023 · 0 comments

WazaAbdulkadir commented Oct 11, 2023

Hi,

In classic soft logic example FF declared without reset.

There are some discussions in the web about FF with and without reset capability to summarize:

If the initial value of the fabric is important or a state diagram needed to be used, then it is advisable to use a flip-flop (FF) with reset capability.
If initial value is not important or reset capability unneeded for less area == less logic == less delay == faster operation == higher operating frequency, FF without reset could be used.

If FPGA fabric will be created for general purpose using FF with reset capability make more sense to me.

I want to ask since in your example FF without reset capability used, is it practical to have FF without reset capability inside of the CLB?

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment