Updating API ref

vm6502q · Apr 2, 2018 · 1668f49 · 1668f49
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diff --git a/docs/api/6502.rst b/docs/api/6502.rst
@@ -8,12 +8,6 @@ Bitwise Hadamard on the Accumulator
 HAX, 0x03, (Implied addressing)
 Bitwise Hadamard on the X Register
 
-ORA, (Multiple instructions for addressing modes)
-Bitwise OR with the Accumulator, will also collapse the quantum state of the Accumulator
-
-ASL, (Multiple instructions for addressing modes)
-Arithmetic Shift Left, will also collapse superposition of the carry flag
-
 SEN, 0x0F, (Implied addressing)
 SEt the Negative flag
 
@@ -35,15 +29,6 @@ Apply a bitwise Pauli Y on the X Register
 CLQ, 0x1F, (Implied addressing)
 CLear Quantum mode flag
 
-AND, (Multiple instructions for addressing modes)
-Bitwise AND with the Accumulator, will also collapse the quantum state of the Accumulator
-
-BIT, (Multiple instructions for addressing modes)
-The 6502's test BITs opcodes, will also collapse the superposition of the Accumulator
-
-ROL, (Multiple instructions for addressing modes)
-ROtate Left, will also collapse superposition of the carry flag
-
 SEV, 0x27, (Implied addressing)
 SEt the oVerflow flag
 
@@ -68,18 +53,12 @@ Bitwise quarter rotation on |1> axis for the X Register
 SEQ, 0x1F, (Implied addressing)
 SEt the Quantum mode flag
 
-EOR, (Multiple instructions for addressing modes)
-Bitwise EOR with the Accumulator, will also collapse the quantum state of the Accumulator
-
 RXA, 0x42, (Implied addressing)
 Bitwise quarter rotation on X axis for Accumulator
 
 RXX, 0x43, (Implied addressing)
 Bitwise quarter rotation on X axis for the X Register
 
-LSR, (Multiple instructions for addressing modes)
-Logical Shift Right, will also collapse superposition of the carry flag
-
 CLZ, 0x47, (Implied addressing)
 CLear the Zero flag
 
@@ -104,15 +83,9 @@ ADd with Carry, Zero Page indexed, will add in superposition if the X register i
 ADC, 0x7D, (Absolute X addressing)
 ADd with Carry, Zero Page indexed, will add in superposition if the X register is superposed. Results in the Accumulator and carry flag become entangled with the X register, such that the result of the addition is entangled with the address loaded from in the X register.
 
-STA, (Multiple instructions for addressing modes)
-STore Accumulator, will also collapse superposition of the Accumulator
-
 TXA, 0x8A, (Implied addressing)
 Transfer X register to Accumulator, will maintain superposition of the X register, entangling it to be the same as the Accumulator when measured
 
-STX, (Multiple instructions for addressing modes)
-STore X register, will also collapse superposition of the X register
-
 TXS, 0x9A, (Implied addressing)
 Transfer X register to Stack pointer, will also collapse superposition of the X register
 
@@ -128,12 +101,6 @@ LoaD Accumulator, Zero Page indexed, will load in superposition if the X registe
 LDA, 0xBD, (Absolute X addressing)
 LoaD Accumulator, Zero Page indexed, will load in superposition if the X register is superposed. Results loaded in the Accumulator become entangled with the X register, such that the result of the load is entangled with the address loaded from in the X register.
 
-CMP, (Multiple instructions for addressing modes)
-CoMPare accumulator. If quantum mode is off, this opcode functions as in the original 6502. If quantum mode is on, and if a flag would be set to 1 in the original system, and if this flag is already on, then this instead flips the phase of the quantum registers, for each such flag.
-
-CPX, (Multiple instructions for addressing modes)
-CoMPare X register. If quantum mode is off, this opcode functions as in the original 6502. If quantum mode is on, and if a flag would be set to 1 in the original system, and if this flag is already on, then this instead flips the phase of the quantum registers, for each such flag.
-
 SBC, 0xF5, (Zero page X addressing)
 SuBtract with Carry, Zero Page indexed, will subtract in superposition if the X register is superposed. Results in the Accumulator and carry flag become entangled with the X register, such that the result of the addition is entangled with the address loaded from in the X register. (Addressing past the zero page loops to the start.)
 
@@ -149,3 +116,36 @@ Apply Pauli Z operator to carry flag
 SBC, 0xFD, (Absolute X addressing)
 SuBtract with Carry, Zero Page indexed, will subtract in superposition if the X register is superposed. Results in the Accumulator and carry flag become entangled with the X register, such that the result of the addition is entangled with the address loaded from in the X register.
 
+AND, (Multiple instructions for addressing modes)
+Bitwise AND with the Accumulator, will also collapse the quantum state of the Accumulator
+
+ASL, (Multiple instructions for addressing modes)
+Arithmetic Shift Left, will also collapse superposition of the carry flag
+
+BIT, (Multiple instructions for addressing modes)
+The 6502's test BITs opcodes, will also collapse the superposition of the Accumulator
+
+CMP, (Multiple instructions for addressing modes)
+CoMPare accumulator. If quantum mode is off, this opcode functions as in the original 6502. If quantum mode is on, and if a flag would be set to 1 in the original system, and if this flag is already on, then this instead flips the phase of the quantum registers, for each such flag.
+
+CPX, (Multiple instructions for addressing modes)
+CoMPare X register. If quantum mode is off, this opcode functions as in the original 6502. If quantum mode is on, and if a flag would be set to 1 in the original system, and if this flag is already on, then this instead flips the phase of the quantum registers, for each such flag.
+
+EOR, (Multiple instructions for addressing modes)
+Bitwise EOR with the Accumulator, will also collapse the quantum state of the Accumulator
+
+LSR, (Multiple instructions for addressing modes)
+Logical Shift Right, will also collapse superposition of the carry flag
+
+ORA, (Multiple instructions for addressing modes)
+Bitwise OR with the Accumulator, will also collapse the quantum state of the Accumulator
+
+ROL, (Multiple instructions for addressing modes)
+ROtate Left, will also collapse superposition of the carry flag
+
+STA, (Multiple instructions for addressing modes)
+STore Accumulator, will also collapse superposition of the Accumulator
+
+STX, (Multiple instructions for addressing modes)
+STore X register, will also collapse superposition of the X register
+
diff --git a/docs/implementation.rst b/docs/implementation.rst
@@ -31,8 +31,12 @@ When an operation happens that would necessarily collapse all superposition in a
 CC65
 ----
 
+An assembler for the vm6502q project has been implemented by extending the instruction set of the MOS-6502. To implement the assembler, one can duplicate an assembler implementation for the 6502 and add the new instruction symbols and binary values to the table of implemented instructions.
+
 .. _c-syntax-enhancements-ref:
 
 C Syntax Enhancements
 ~~~~~~~~~~~~~~~~~~~~~
 
+New higher level syntax extensions are under development using the CC65 C compiler for the 6502. These syntax extensions will leverage the quantum parallel LoaD Accumulator ("LDA") instruction, quantum paralell ADd with Carry ("ADC") instruction, and quantum parallel SuBtract with Carry ("SBC") instruction, as well as the amplitude amplification capabilities of vm6502q, using the modified behavior of status flags in "quantum mode." More is to follow soon.
+
diff --git a/docs/index.rst b/docs/index.rst
@@ -55,7 +55,7 @@ Qrack is a C++ quantum bit simulator, with the ability to support arbitrary numb
 
 As a demonstration of the :cpp:class:`Qrack::CoherentUnit` implementation, a MOS-6502 microprocessor [MOS-6502]_ virtual machine has been modified with a set of new opcodes supporting quantum operations.  The `vm6502q <https://github.com/vm6502q/vm6502q>`_ virtual machine exposes new integrated quantum opcodes such as Hadamard transforms and an X-indexed LDA, with the X register in superposition, across a page of memory.  An assembly example of a Grover's search with a simple oracle function is demonstrated in the `examples <https://github.com/vm6502q/examples>`_ repository.
 
-Finally, a `6502 toolchain <https://github.com/vm6502q/cc65>`_ - based on CC65 `CC65 <http://cc65.github.io/doc/>`_ - has been modified and enhanced to support both the new opcodes - for the assembler - as well as :ref:`c-syntax-enhancements-ref`.  This is performed primarily as sandbox/exploratory work to help clarify what quantum computational software engineering might look like as the hardware reaches commoditization.
+Finally, a `6502 toolchain <https://github.com/vm6502q/cc65>`_ - based on `CC65 <http://cc65.github.io/doc/>`_ - has been modified and enhanced to support both the new opcodes - for the assembler - as well as :ref:`c-syntax-enhancements-ref`.  This is performed primarily as sandbox/exploratory work to help clarify what quantum computational software engineering might look like as the hardware reaches commoditization.
 
 .. toctree::
     :maxdepth: 2