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| VM6502Q Opcodes | ||
| =============== | ||
| Bellow is a list of new and modified opcodes with their binary and function. If an opcode description is not here to specifically state that the opcode collapses register or flag superposition, it can be assumed that it does not. However, if a (non X register indexed) instruction would overwrite the value of a register or flag, then superposition would be expected to be overwritten. If an instruction is X register indexed, then in quantum mode, it will operate according to the superposition of the X register. | ||
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| HAA, 0x02, (Implied addressing) | ||
| Bitwise Hadamard on the Accumulator | ||
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| HAX, 0x03, (Implied addressing) | ||
| Bitwise Hadamard on the X Register | ||
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| ORA, (Multiple instructions for addressing modes) | ||
| Bitwise OR with the Accumulator, will also collapse the quantum state of the Accumulator | ||
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| ASL, (Multiple instructions for addressing modes) | ||
| Arithmetic Shift Left, will also collapse superposition of the carry flag | ||
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| SEN, 0x0F, (Implied addressing) | ||
| SEt the Negative flag | ||
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| PXA, 0x12, (Implied addressing) | ||
| Apply a bitwise Pauli X on the Accumulator | ||
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| PXA, 0x13, (Implied addressing) | ||
| Apply a bitwise Pauli X on the X Register | ||
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| HAC, 0x17, (Implied addressing) | ||
| Apply a Hadamard gate on the carry flag | ||
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| PYA, 0x1A, (Implied addressing) | ||
| Apply a bitwise Pauli Y on the Accumulator | ||
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| PYA, 0x1B, (Implied addressing) | ||
| Apply a bitwise Pauli Y on the X Register | ||
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| CLQ, 0x1F, (Implied addressing) | ||
| CLear Quantum mode flag | ||
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| AND, (Multiple instructions for addressing modes) | ||
| Bitwise AND with the Accumulator, will also collapse the quantum state of the Accumulator | ||
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| BIT, (Multiple instructions for addressing modes) | ||
| The 6502's test BITs opcodes, will also collapse the superposition of the Accumulator | ||
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| ROL, (Multiple instructions for addressing modes) | ||
| ROtate Left, will also collapse superposition of the carry flag | ||
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| SEV, 0x27, (Implied addressing) | ||
| SEt the oVerflow flag | ||
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| SEZ, 0x2B, (Implied addressing) | ||
| SEt the Zero flag | ||
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| CLN, 0x2F, (Implied addressing) | ||
| CLear the Negative flag | ||
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| PZA, 0x32, (Implied addressing) | ||
| Apply a bitwise Pauli Z on Accumulator | ||
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| PZA, 0x33, (Implied addressing) | ||
| Apply a bitwise Pauli Z on the X Register | ||
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| RTA, 0x3A, (Implied addressing) | ||
| Bitwise quarter rotation on |1> axis for Accumulator | ||
| RTX, 0x3B, (Implied addressing) | ||
| Bitwise quarter rotation on |1> axis for the X Register | ||
| SEQ, 0x1F, (Implied addressing) | ||
| SEt the Quantum mode flag | ||
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| EOR, (Multiple instructions for addressing modes) | ||
| Bitwise EOR with the Accumulator, will also collapse the quantum state of the Accumulator | ||
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| RXA, 0x42, (Implied addressing) | ||
| Bitwise quarter rotation on X axis for Accumulator | ||
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| RXX, 0x43, (Implied addressing) | ||
| Bitwise quarter rotation on X axis for the X Register | ||
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| LSR, (Multiple instructions for addressing modes) | ||
| Logical Shift Right, will also collapse superposition of the carry flag | ||
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| CLZ, 0x47, (Implied addressing) | ||
| CLear the Zero flag | ||
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| RZA, 0x5A, (Implied addressing) | ||
| Bitwise quarter rotation on Z axis for Accumulator | ||
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| RZX, 0x5B, (Implied addressing) | ||
| Bitwise quarter rotation on Z axis for the X Register | ||
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| RZX, 0x5B, (Implied addressing) | ||
| Bitwise quarter rotation on Z axis for the X Register | ||
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| FTA, 0x62, (Implied addressing) | ||
| Quantum Fourier Transform on Accumulator | ||
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| FTX, 0x63, (Implied addressing) | ||
| Quantum Fourier Transform on the X register | ||
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| ADC, 0x75, (Zero page X addressing) | ||
| ADd with Carry, Zero Page indexed, will add in superposition if the X register is superposed. Results in the Accumulator and carry flag become entangled with the X register, such that the result of the addition is entangled with the address loaded from in the X register. (Addressing past the zero page loops to the start.) | ||
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| ADC, 0x7D, (Absolute X addressing) | ||
| ADd with Carry, Zero Page indexed, will add in superposition if the X register is superposed. Results in the Accumulator and carry flag become entangled with the X register, such that the result of the addition is entangled with the address loaded from in the X register. | ||
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| STA, (Multiple instructions for addressing modes) | ||
| STore Accumulator, will also collapse superposition of the Accumulator | ||
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| TXA, 0x8A, (Implied addressing) | ||
| Transfer X register to Accumulator, will maintain superposition of the X register, entangling it to be the same as the Accumulator when measured | ||
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| STX, (Multiple instructions for addressing modes) | ||
| STore X register, will also collapse superposition of the X register | ||
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| TXS, 0x9A, (Implied addressing) | ||
| Transfer X register to Stack pointer, will also collapse superposition of the X register | ||
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| TAY, 0xA8, (Implied addressing) | ||
| Transfer Accumulator Y register, will also collapse superposition of the Accumulator | ||
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| TAX, 0x8A, (Implied addressing) | ||
| Transfer Accumulator to X register, will maintain superposition of the Accumulator, entangling it to be the same as the X register when measured | ||
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| LDA, 0xB5, (Zero page X addressing) | ||
| LoaD Accumulator, Zero Page indexed, will load in superposition if the X register is superposed. Results loaded in the Accumulator become entangled with the X register, such that the result of the load is entangled with the address loaded from in the X register. (Addressing past the zero page loops to the start.) | ||
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| LDA, 0xBD, (Absolute X addressing) | ||
| LoaD Accumulator, Zero Page indexed, will load in superposition if the X register is superposed. Results loaded in the Accumulator become entangled with the X register, such that the result of the load is entangled with the address loaded from in the X register. | ||
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| CMP, (Multiple instructions for addressing modes) | ||
| CoMPare accumulator. If quantum mode is off, this opcode functions as in the original 6502. If quantum mode is on, and if a flag would be set to 1 in the original system, and if this flag is already on, then this instead flips the phase of the quantum registers, for each such flag. | ||
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| CPX, (Multiple instructions for addressing modes) | ||
| CoMPare X register. If quantum mode is off, this opcode functions as in the original 6502. If quantum mode is on, and if a flag would be set to 1 in the original system, and if this flag is already on, then this instead flips the phase of the quantum registers, for each such flag. | ||
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| SBC, 0xF5, (Zero page X addressing) | ||
| SuBtract with Carry, Zero Page indexed, will subtract in superposition if the X register is superposed. Results in the Accumulator and carry flag become entangled with the X register, such that the result of the addition is entangled with the address loaded from in the X register. (Addressing past the zero page loops to the start.) | ||
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| QZZ, 0xF7, (Implied addressing) | ||
| Apply Pauli Z operator to zero flag | ||
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| QZS, 0xFA, (Implied addressing) | ||
| Apply Pauli Z operator to negative flag | ||
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| QZC, 0xFB, (Implied addressing) | ||
| Apply Pauli Z operator to carry flag | ||
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| SBC, 0xFD, (Absolute X addressing) | ||
| SuBtract with Carry, Zero Page indexed, will subtract in superposition if the X register is superposed. Results in the Accumulator and carry flag become entangled with the X register, such that the result of the addition is entangled with the address loaded from in the X register. | ||
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