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exynos5422_evt0.dtsi
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exynos5422_evt0.dtsi
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/*
* SAMSUNG EXYNOS5422 SoC device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* SAMSUNG EXYNOS5422 SoC device nodes are listed in this file.
* EXYNOS5422 based board files can include this file and provide
* values for board specfic bindings.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "exynos5.dtsi"
#include "exynos5422-pinctrl.dtsi"
/ {
compatible = "samsung,exynos5422";
interrupt-parent = <&gic>;
aliases {
pinctrl0 = &pinctrl_0;
pinctrl1 = &pinctrl_1;
pinctrl2 = &pinctrl_2;
pinctrl3 = &pinctrl_3;
pinctrl4 = &pinctrl_4;
mshc0 = &dwmmc_0;
mshc1 = &dwmmc_1;
mshc2 = &dwmmc_2;
mfc0 = &mfc_0;
gsc0 = &gsc_0;
gsc1 = &gsc_1;
mdev0 = &mdev_0;
spi0 = &spi_0;
spi1 = &spi_1;
spi2 = &spi_2;
jpeg0 = &jpeg_0;
jpeg1 = &jpeg_1;
spi3 = &spi_3;
spi4 = &spi_4;
scaler0 = &scaler_0;
scaler1 = &scaler_1;
scaler2 = &scaler_2;
fimg2d0 = &fimg2d_0;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x100>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x101>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x102>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x103>;
};
cpu@4 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x0>;
};
cpu@5 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x1>;
};
cpu@6 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x2>;
};
cpu@7 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x3>;
};
};
watchdog:watchdog0@101D0000 {
compatible = "samsung,s3c2410-wdt";
reg = <0x101D0000 0x100>;
status = "disabled";
interrupts = <0 42 0>;
clocks = <&clock 1508>, <&clock 1508>;
clock-names = "rate_watchdog", "gate_watchdog";
timeout-sec = <30>;
pmu_wdt_reset_type = <1>;
};
firmware@02073000 {
compatible = "samsung,secure-firmware";
reg = <0x02073000 0x1000>;
};
combiner:interrupt-controller@10440000 {
samsung,combiner-irqbase = <256>;
};
clock: clock-controller@0x10010000 {
compatible = "samsung,exynos5422-clock";
reg = <0x10010000 0x30000>;
#clock-cells = <1>;
};
cci {
compatible = "arm,cci";
reg = <0x10d20000 0x10000>;
#address-cells = <1>;
#size-cells = <0>;
cci_s@0 {
device_type = "cci";
SIF = "SIF0";
reg = <0x1000>;
};
cci_s@1 {
device_type = "cci";
SIF = "SIF1";
reg = <0x2000>;
};
cci_s@2 {
device_type = "cci";
SIF = "SIF2";
reg = <0x3000>;
};
cci_s@3 {
device_type = "cci";
SIF = "KFC";
reg = <0x4000>;
};
cci_s@4 {
device_type = "cci";
SIF = "EAGLE";
reg = <0x5000>;
};
};
mct@101C0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101C0000 0x800>;
interrupt-controller;
#interrups-cells = <2>;
interrupt-parent = <&mct_map>;
interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
<4 0>, <5 0>, <6 0>, <7 0>,
<8 0>, <9 0>, <10 0>, <11 0>;
clocks = <&clock 1>, <&clock 964>;
clock-names = "fin_pll", "mct";
mct_map: mct-map {
#interrupt-cells = <2>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = <0 0 &combiner 23 3>,
<1 0 &combiner 23 4>,
<2 0 &combiner 25 2>,
<3 0 &combiner 25 3>,
<4 0 &gic 0 120 0>,
<5 0 &gic 0 121 0>,
<6 0 &gic 0 122 0>,
<7 0 &gic 0 123 0>,
<8 0 &gic 0 128 0>,
<9 0 &gic 0 129 0>,
<10 0 &gic 0 130 0>,
<11 0 &gic 0 131 0>;
};
};
clock_pwm: pwm-clock-controller@12dd0000 {
compatible = "samsung,exynos-pwm-clock";
reg = <0x12DD0000 0x50>;
#clock-cells = <1>;
};
serial@12C00000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C00000 0x100>;
pinctrl-names = "default";
pinctrl-0 = <&uart0_bus>;
clocks = <&clock 1165>, <&clock 1499>;
clock-names = "sclk_uart0", "gate_uart0";
};
serial@12C10000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C10000 0x100>;
pinctrl-names = "default";
pinctrl-0 = <&uart1_bus>;
clocks = <&clock 1164>, <&clock 1498>;
clock-names = "sclk_uart1", "gate_uart1";
};
serial@12C20000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C20000 0x100>;
pinctrl-names = "default";
pinctrl-0 = <&uart2_bus>;
clocks = <&clock 1163>, <&clock 1497>;
clock-names = "sclk_uart2", "gate_uart2";
};
serial@12C30000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C30000 0x100>;
pinctrl-names = "default";
pinctrl-0 = <&uart3_bus>;
clocks = <&clock 1162>, <&clock 1496>;
clock-names = "sclk_uart3", "gate_uart3";
};
pinctrl_0: pinctrl@13400000 {
compatible = "samsung,exynos5422-pinctrl";
reg = <0x13400000 0x1000>;
interrupts = <0 45 0>;
wakeup-interrupt-controller {
compatible = "samsung,exynos4210-wakeup-eint";
interrupts = <0 32 0>;
};
};
pinctrl_1: pinctrl@13410000 {
compatible = "samsung,exynos5422-pinctrl";
reg = <0x13410000 0x1000>;
interrupts = <0 78 0>;
};
pinctrl_2: pinctrl@14000000 {
compatible = "samsung,exynos5422-pinctrl";
reg = <0x14000000 0x1000>;
interrupts = <0 46 0>;
};
pinctrl_3: pinctrl@14010000 {
compatible = "samsung,exynos5422-pinctrl";
reg = <0x14010000 0x1000>;
interrupts = <0 50 0>;
};
pinctrl_4: pinctrl@03860000 {
compatible = "samsung,exynos5422-pinctrl";
reg = <0x03860000 0x1000>;
interrupts = <0 47 0>;
};
sysmmu_g2d: sysmmu@0x10A60000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x10A60000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <24 5>;
clock-names = "sysmmu", "master";
clocks = <&clock 231>, <&clock 234>;
mmu-masters = <&fimg2d_0>;
prop-map {
iomap = "r";
};
};
sysmmu_g2d_wr: sysmmu@0x10A70000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x10A70000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <22 2>;
clock-names = "sysmmu", "master";
clocks = <&clock 231>, <&clock 234>;
mmu-masters = <&fimg2d_0>;
prop-map {
iomap = "w";
};
};
sysmmu_tv: sysmmu@0x14650000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x14650000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <7 4>;
clock-names = "sysmmu", "master";
clocks = <&clock 1320>, <&clock 1324>;
mmu-masters = <&mixer>;
qos = <15>;
};
sysmmu_gscl0: sysmmu@0x13E80000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x13E80000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <2 0>;
clock-names = "sysmmu", "master";
clocks = <&clock 1286>, <&clock 1264>;
mmu-masters = <&gsc_0>;
};
sysmmu_gscl1: sysmmu@0x13E90000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x13E90000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <2 2>;
clock-names = "sysmmu", "master";
clocks = <&clock 1285>, <&clock 1263>;
mmu-masters = <&gsc_1>;
};
sysmmu_scaler0r: sysmmu@0x12880000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x12880000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <22 4>;
clock-names = "sysmmu", "master";
clocks = <&clock 1542>, <&clock 1550>;
mmu-masters = <&scaler_0>;
prop-map {
iomap = "r";
};
};
sysmmu_scaler1r: sysmmu@0x12890000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x12890000 0x1000>;
interrupts = <0 186 0>;
clock-names = "sysmmu", "master";
clocks = <&clock 1541>, <&clock 1549>;
mmu-masters = <&scaler_1>;
prop-map {
iomap = "r";
};
};
sysmmu_scaler2r: sysmmu@0x128A0000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x128A0000 0x1000>;
interrupts = <0 188 0>;
clock-names = "sysmmu", "master";
clocks = <&clock 1540>, <&clock 1548>;
mmu-masters = <&scaler_2>;
prop-map {
iomap = "r";
};
};
sysmmu_scaler0w: sysmmu@0x128C0000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x128C0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <27 2>;
clock-names = "sysmmu", "master";
clocks = <&clock 1542>, <&clock 1550>;
mmu-masters = <&scaler_0>;
prop-map {
iomap = "w";
};
};
sysmmu_scaler1w: sysmmu@0x128D0000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x128D0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <22 6>;
clock-names = "sysmmu", "master";
clocks = <&clock 1541>, <&clock 1549>;
mmu-masters = <&scaler_1>;
prop-map {
iomap = "w";
};
};
sysmmu_scaler2w: sysmmu@0x128E0000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x128E0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <19 6>;
clock-names = "sysmmu", "master";
clocks = <&clock 1540>, <&clock 1548>;
mmu-masters = <&scaler_2>;
prop-map {
iomap = "w";
};
};
sysmmu_jpeg: sysmmu@0x11F10000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x11F10000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 2>;
clock-names = "sysmmu", "master";
clocks = <&clock 1413>, <&clock 1418>;
mmu-masters = <&jpeg_0>;
};
sysmmu_jpeg2: sysmmu@0x11F20000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x11F20000 0x1000>;
interrupts = <0 169 0>;
clock-names = "sysmmu", "master";
clocks = <&clock 1413>, <&clock 1417>;
mmu-masters = <&jpeg_1>;
};
sysmmu_mfc0_0: sysmmu@0x11200000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x11200000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <6 2>;
clock-names = "sysmmu", "master";
clocks = <&clock 1349>, <&clock 1350>;
mmu-masters = <&mfc_0>;
};
sysmmu_mfc0_1: sysmmu@0x11210000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x11210000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <8 5>;
clock-names = "sysmmu", "master";
clocks = <&clock 1348>, <&clock 1350>;
mmu-masters = <&mfc_0>;
};
sysmmu_fimd0x: sysmmu@0x14640000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x14640000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <3 2>;
clock-names = "sysmmu", "master";
clocks = <&clock 1322>, <&clock 1329>;
qos = <15>;
mmu-masters = <&fimd_fb>;
prop-map {
winmap = <0x11>;
};
};
sysmmu_fimd1x: sysmmu@0x14680000 {
compatible = "samsung,exynos4210-sysmmu";
reg = <0x14680000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <3 0>;
clock-names = "sysmmu", "master";
clocks = <&clock 1321>, <&clock 1329>;
qos = <15>;
mmu-masters = <&fimd_fb>;
prop-map {
winmap = <0xe>;
};
};
/* disp_driver */
fimd_fb: fimd_fb {
compatible = "samsung,exynos5-disp_driver";
reg = <0x14400000 0x40000>, <0x14500000 0x8000>, <0x145A0000 0x48>;
samsung,power-domain = <&spd_fimd>;
interrupt-controller;
#interrups-cells = <2>;
interrupt-parent = <&fimd_fb_int_map>;
interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
/*int-mipi-dsi0 = 113;
int-mipi-dsi1 = 114;*/
/* Clocks for the DECON driver */
/* Clocks for the MIPI-DSI driver */
clocks = <&clock 2101>, <&clock 4101>,
<&clock 1329>, <&clock 2104>, <&clock 1061>,
<&clock 2004>, <&clock 2107>, <&clock 2078>,
<&clock 2068>, <&clock 4016>, <&clock 2054>,
<&clock 2002>, <&clock 2083>, <&clock 2073>,
<&clock 4021>, <&clock 2059>, <&clock 601>,
<&clock 1326>, <&clock 4103>, <&clock 2008>;
clock-names = "mout_dp1_ext_mst_vid", "dout_dp1_ext_mst_vid",
"clk_fimd1", "mout_fimd1", "sclk_fimd1",
"mout_rpll_ctrl", "mout_fimd1_mdnie1", "mout_aclk_300_disp1_user",
"mout_aclk_300_disp1_sw", "dout_aclk_300_disp1", "mout_aclk_300_disp1",
"mout_dpll_ctrl", "mout_aclk_400_disp1_user", "mout_aclk_400_disp1_sw",
"dout_aclk_400_disp1", "mout_aclk_400_disp1", "aclk_axi_disp1x",
"clk_dsim1", "dout_fimd1", "mout_mpll_ctrl";
pinctrl-names = "turnon_tes", "turnoff_tes";
pinctrl-0 = <&disp_teson>;
pinctrl-1 = <&disp_tesoff>;
fimd_fb_int_map: fimd_fb_int_map {
#interrupt-cells = <2>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = <0 0 &combiner 18 5>,
<1 0 &combiner 18 4>,
<2 0 &combiner 18 6>,
<3 0 &gic 0 82 0>;
};
fimd: fimd_ctrl {
samsung,vidcon0 = <0x8000>;
samsung,vidcon1 = <0x00>;
samsung,default_win = <0>;
fb_driver_data {
fb_variant {
nr_windows = <5>;
vidcon1 = <0x20004>;
vidtcon = <0x20010>;
wincon = <0x20>;
winmap = <0x180>;
keycon = <0x140>;
osd = <0x40>;
osd_stride = <16>;
buf_start = <0xA0>;
buf_size = <0x100>;
buf_end = <0xD0>;
palette_0 = <0x2400>;
palette_1 = <0x2800>;
palette_2 = <0x2c00>;
palette_3 = <0x3000>;
palette_4 = <0x3400>;
has_shadowcon = <1>;
has_blendcon = <1>;
has_alphacon = <1>;
has_fixvclk = <0>;
};
};
};
};
dwmmc_0: dwmmc0@12200000 {
compatible = "samsung,exynos5422-dw-mshc";
reg = <0x12200000 0x2000>;
interrupts = <0 75 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 746>, <&clock 1126>, <&clock 4110>;
clock-names = "biu", "gate_ciu", "dout_mmc_a";
status = "disabled";
};
dwmmc_1: dwmmc1@12210000 {
compatible = "samsung,exynos5422-dw-mshc";
reg = <0x12210000 0x2000>;
interrupts = <0 76 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 745>, <&clock 1125>, <&clock 4111>;
clock-names = "biu", "gate_ciu", "dout_mmc_a";
status = "disabled";
};
dwmmc_2: dwmmc2@12220000 {
compatible = "samsung,exynos5422-dw-mshc";
reg = <0x12220000 0x2000>;
interrupts = <0 77 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 744>, <&clock 1124>, <&clock 4112>;
clock-names = "biu", "gate_ciu", "dout_mmc_a";
status = "disabled";
};
i2c_0: i2c@12C60000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C60000 0x1000>;
interrupts = <0 56 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
clocks = <&clock 1494>, <&clock 1494>;
clock-names = "rate_i2c", "gate_i2c";
status = "disabled";
};
i2c_1: i2c@12C70000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C70000 0x1000>;
interrupts = <0 57 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
clocks = <&clock 1493>, <&clock 1493>;
clock-names = "rate_i2c", "gate_i2c";
status = "disabled";
};
/*
i2c_2: i2c@12C80000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C80000 0x1000>;
interrupts = <0 58 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
clocks = <&clock 1492>, <&clock 1492>;
clock-names = "rate_i2c", "gate_i2c";
status = "disabled";
};
*/
i2c_3: i2c@12C90000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C90000 0x1000>;
interrupts = <0 59 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_bus>;
clocks = <&clock 1491>, <&clock 1491>;
clock-names = "rate_i2c", "gate_i2c";
status = "disabled";
};
hsi2c_0: hsi2c@12CA0000 {
compatible = "samsung,exynos5-hsi2c";
samsung,polling-mode;
reg = <0x12CA0000 0x1000>;
interrupts = <0 60 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&hs_i2c0_bus>;
clocks = <&clock 1490>, <&clock 1490>;
clock-names = "rate_hsi2c", "gate_hsi2c";
status = "disabled";
};
hsi2c_1: hsi2c@12CB0000 {
compatible = "samsung,exynos5-hsi2c";
samsung,polling-mode;
reg = <0x12CB0000 0x1000>;
interrupts = <0 61 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&hs_i2c1_bus>;
clocks = <&clock 1489>, <&clock 1489>;
clock-names = "rate_hsi2c", "gate_hsi2c";
status = "disabled";
};
hsi2c_2: hsi2c@12CC0000 {
compatible = "samsung,exynos5-hsi2c";
samsung,polling-mode;
reg = <0x12CC0000 0x1000>;
interrupts = <0 62 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&hs_i2c2_bus>;
clocks = <&clock 1488>, <&clock 1488>;
clock-names = "rate_hsi2c", "gate_hsi2c";
status = "disabled";
};
hsi2c_3: hsi2c@12CD0000 {
compatible = "samsung,exynos5-hsi2c";
samsung,polling-mode;
reg = <0x12CD0000 0x1000>;
interrupts = <0 63 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&hs_i2c3_bus>;
clocks = <&clock 1487>, <&clock 1487>;
clock-names = "rate_hsi2c", "gate_hsi2c";
status = "disabled";
};
hsi2c_4: hsi2c@12E00000 {
compatible = "samsung,exynos5-hsi2c";
samsung,polling-mode;
reg = <0x12E00000 0x1000>;
interrupts = <0 87 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&hs_i2c4_bus>;
clocks = <&clock 1475>, <&clock 1475>;
clock-names = "rate_hsi2c", "gate_hsi2c";
status = "disabled";
};
hsi2c_5: hsi2c@12E10000 {
compatible = "samsung,exynos5-hsi2c";
samsung,polling-mode;
reg = <0x12E10000 0x1000>;
interrupts = <0 88 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&hs_i2c5_bus>;
clocks = <&clock 1473>, <&clock 1473>;
clock-names = "rate_hsi2c", "gate_hsi2c";
status = "disabled";
};
hsi2c_6: hsi2c@12E20000 {
compatible = "samsung,exynos5-hsi2c";
samsung,polling-mode;
reg = <0x12E20000 0x1000>;
interrupts = <0 203 0>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&hs_i2c6_bus>;
clocks = <&clock 1472>, <&clock 1472>;
clock-names = "rate_hsi2c", "gate_hsi2c";
status = "disabled";
};
mali {
compatible = "arm,mali";
reg = <0x11800000 0x5000>;
interrupts = <0 219 0>, <0 74 0>, <0 117 0>;
clocks = <&clock 10>, <&clock 2007>, <&clock 2002>,
<&clock 2056>, <&clock 4018>, <&clock 2070>,
<&clock 2080>, <&clock 1376>, <&clock 1>,
<&clock 2136>;
clock-names = "fout_vpll", "mout_vpll_ctrl", "mout_dpll_ctrl",
"mout_aclk_g3d", "dout_aclk_g3d", "mout_aclk_g3d_sw",
"mout_aclk_g3d_user", "clk_g3d_ip", "fin_pll",
"armclk";
samsung,power-domain = <&pd_g3d>;
};
amba {
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,amba-bus";
interrupt-parent = <&gic>;
interrupt-cells = <3>;
ranges;
mdma0: mdma@10800000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x10800000 0x1000>;
interrupts = <0 33 0>;
clocks = <&clock 236>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
pdma0: pdma@121A0000{
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
interrupts = <0 34 0>;
clocks = <&clock 755>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@121B0000{
compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>;
interrupts = <0 35 0>;
clocks = <&clock 754>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
#dma-secure-mode = <1>;
};
adma: adma@03880000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x03880000 0x1000>;
interrupts = <0 110 0>;
clocks = <&clock 1089>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <6>;
#dma-requests = <16>;
#dma-mcode-addr = <0x03027000>;
};
};
ehci: usb@12110000 {
compatible = "samsung,exynos5-ehci";
reg = <0x12110000 0x100>;
interrupts = <0 71 0>;
clocks = <&clock 1449>;
clock-names = "usbhost";
status = "ok";
usb-phy = <&usb2_phy>;
};
ohci: usb@12120000 {
compatible = "samsung,exynos5-ohci";
reg = <0x12120000 0x100>;
interrupts = <0 71 0>;
clocks = <&clock 1449>;
clock-names = "usbhost";
status = "ok";
usb-phy = <&usb2_phy>;
};
usb2_phy: usb2phy@12130000 {
compatible = "samsung,exynos5-usb2phy";
reg = <0x12130000 0x100>;
clocks = <&clock 1>, <&clock 1449>;
clock-names = "ext_xtal", "usbhost";
#address-cells = <1>;
#size-cells = <1>;
ranges;
usbphy-sys {
reg = <0x10040704 0xC>;
};
};
usb@12000000 {
compatible = "samsung,exynos5-dwusb3";
clocks = <&clock 1448>;
clock-names = "usbdrd30";
#address-cells = <1>;
#size-cells = <1>;
ranges;
status = "disabled";
dwc3 {
compatible = "synopsys,dwc3";
reg = <0x12000000 0x10000>;
interrupts = <0 72 0>;
usb-phy = <&dwc3_usb2_phy_0 &dwc3_usb3_phy_0>;
};
};
usb@12400000 {
compatible = "samsung,exynos5-dwusb3";
clocks = <&clock 1447>;
clock-names = "usbdrd30";
#address-cells = <1>;
#size-cells = <1>;
ranges;
status = "disabled";
dwc3 {
compatible = "synopsys,dwc3";
reg = <0x12400000 0x10000>;
interrupts = <0 73 0>;
usb-phy = <&dwc3_usb2_phy_1 &dwc3_usb3_phy_1>;
};
};
adc@12D10000 {
compatible = "samsung,exynos-adc-v2";
reg = <0x12D10000 0x100>;
interrupts = <0 106 0>;
#io-channel-cells = <1>;
io-channel-ranges;
clocks = <&clock 1485>;
clock-names = "gate_adcif";
};
dwc3_usb2_phy_0: usbphy@0 {
compatible = "samsung,exynos5-usb2phy-dummy";
};
dwc3_usb2_phy_1: usbphy@1 {
compatible = "samsung,exynos5-usb2phy-dummy";
};
dwc3_usb3_phy_0: usbphy@12100000 {
compatible = "samsung,exynos5420-usb3phy";
reg = <0x12100000 0x100>;
clocks = <&clock 1>, <&clock 1448>;
clock-names = "ext_xtal", "usbdrd30";
#address-cells = <1>;
#size-cells = <1>;
ranges;
usbphy-sys {
reg = <0x10040704 0x4>;
};
};
dwc3_usb3_phy_1: usbphy@12500000 {
compatible = "samsung,exynos5420-usb3phy";
reg = <0x12500000 0x100>;
clocks = <&clock 1>, <&clock 1447>;
clock-names = "ext_xtal", "usbdrd30";
#address-cells = <1>;
#size-cells = <1>;
ranges;
usbphy-sys {
reg = <0x10040708 0x4>;
};
};
spi_0: spi@12d20000 {
compatible = "samsung,exynos5410-spi";
reg = <0x12d20000 0x100>;
interrupts = <0 68 0>;
dma-mode;
dmas = <&pdma0 5
&pdma0 4>;
dma-names = "tx", "rx";
swap-mode;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 1484>, <&clock 4134>;
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi0_bus>;
};
spi_1: spi@12d30000 {
compatible = "samsung,exynos5410-spi";
reg = <0x12d30000 0x100>;
interrupts = <0 69 0>;
dma-mode;
dmas = <&pdma1 5
&pdma1 4>;
dma-names = "tx", "rx";
swap-mode;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 1483>, <&clock 4135>;
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi1_bus>;
};
spi_2: spi@12d40000 {
compatible = "samsung,exynos5410-spi";
reg = <0x12d40000 0x100>;
interrupts = <0 70 0>;
dmas = <&pdma0 7
&pdma0 6>;
dma-names = "tx", "rx";
swap-mode;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 1482>, <&clock 4136>;
clock-names = "spi", "spi_busclk0";
pinctrl-names = "default";
pinctrl-0 = <&spi2_bus>;
};
mfc_0: mfc@11000000 {
compatible = "samsung,mfc-v6";
reg = <0x11000000 0x10000>;
interrupts = <0 96 0>;
clock-names = "mfc", "aclk_333", "mout_aclk_333_user", "gate_ip_mfc", "mout_aclk_333_sw", "dout_aclk_333";
clocks = <&clock 1350>, <&clock 486>, <&clock 2041>, <&clock 1234>, <&clock 2034>, <&clock 4008>;
samsung,power-domain = <&pd_mfc0>;
status = "ok";
ip_ver = <10>;
clock_rate = <400000000>;
min_rate = <100000>;
num_qos_steps = <4>;
mfc_qos_table {
mfc_qos_variant_0 {
thrd_mb = <0>;
freq_mfc = <100000>;
freq_int = <200000>;
freq_mif = <200000>;
freq_cpu = <0>;
freq_kfc = <0>;
};
mfc_qos_variant_1 {
thrd_mb = <108000>;
freq_mfc = <134000>;
freq_int = <200000>;
freq_mif = <200000>;
freq_cpu = <0>;
freq_kfc = <0>;
};
mfc_qos_variant_2 {
thrd_mb = <244800>;
freq_mfc = <200000>;
freq_int = <300000>;
freq_mif = <300000>;
freq_cpu = <0>;
freq_kfc = <400000>;
};
mfc_qos_variant_3 {
thrd_mb = <489600>;
freq_mfc = <400000>;
freq_int = <420000>;
freq_mif = <400000>;
freq_cpu = <0>;
freq_kfc = <400000>;
};
};
};