Combinatorial Loop Alert while Generating bitstream for vicuna using CV32E40X as a scalar core

[Nikhil-311293]

Hello @michael-platzer and vicuna community,

I am trying to run the demo version of vicuna using cv32e40x as a scalar core. While generating the bitstream (Genesys2 Target) for the same I am getting following errors. I've followed the exact same process as mentioned in the demo/ and sw/ repositories.

Attaching the top module combinations as below

Your feedback will be really appreciated. Thank you.