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Attaching DDR as external memory #16
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Attaching an external memory is very board-specific, thus I have not included it in the demo section. In order to attach an external DDR memory and fill it with application data, you need to implement the following:
As an additional recommendation, you might want to test steps 3 and 4 (checking whether the boot program and serial downloader actually work by downloading an application to the onboard RAM) before attaching your external DDR memory. |
Thank you @michael-platzer plz keep the issue open so that after I read and search about all the great information you mentioned I can ask possible questions about the topic, and again thank you... You are a big help! |
Hi @michael-platzer I have completed this part as you mentioned and it is working very fine |
Hi @michael-platzer I have worked on MIG since previous comment and I have encountered an error when creating .elf file with new linker. I have edited the linker as you said: |
It seems that you are on the right track. The linking error is because you set the size of your external memory to 16 MB minus 1 byte. The stack is placed at the end of the RAM but needs to be aligned. Set the size of the RAM to 16 MB (i.e., In your Be aware that Finally, the current implementation assumes that memory access always has a latency of 1 cycle and thus sets |
Hi @michael-platzer sorry for answering a bit late I was trying to solve the issue but apparently I should ask again: I know I have asked a lot but if you can suggest something for linker and this issue I will be very thankful Here is the updated version I corrected some of the problems you implied... |
The reason for the linker error is that the exception vectors cannot reach the code that is in the external RAM with a simple jump. Replace the
For word addressing the lowest two bits of If the external memory does not have constant latency or the documentation does not specify the latency, then you could initially only allow one outstanding memory request at a time. |
Thank you again @michael-platzer I did what you said for the crt0.s file and the error is gone... but just one weird thing: |
Yes, that is normal. The reason is that You can avoid creating the
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Great I get it now... |
Yes, the output you are seeing is from the exception handler in The signal I would recommend to try simulating the design in order to debug this. |
Thank you @michael-platzer.. I will try to do what you say, by the way I asked https://github.com/lowRISC/ibex/issues/1510 in Ibex repo (since I asked a lot from you I didn't want to bother you again) but they don't answer. I asked the question in stackoverflow https://stackoverflow.com/questions/70766820/ddr2-memory-actual-width-and-understanding as well but again no answers there either.. Do you know the answer of that question I asked? I can post it here as well... Besides if in demo_top I set |
Hi @michael-platzer again I have a question, I have read your paper multiple times https://publik.tuwien.ac.at/files/publik_296583.pdf and in there (figure 2) you demonstrated a picture of Ibex and Vicuna with both data and instruction caches and an external memory... Since now in the demo project there is a RAM which utilize bram of FPGA and by default no caches are enabled, I really want to replace bram with ddr2 memory of my nexyxs 4 ddr board so that I can implement much larger applications like CNN networks... I am kind of familiar with the MIG IP of Vivado and I have created it but attaching it as an external memory to the core and most importantly filling it with .vmem file is a problem (since like microblaze there is no bootloader for Ibex and all that stuff) since you have done it can you help? Is it possible to have an example for it in this repo as well? I think no one have mentioned it and I have not found anything useful I really tried to do it but that filling part with .vmem (initializing ddr with .vmem file) as I mentioned is really a big problem for me to understand and solve (as you of course know we cannot use $readmemh for ddr to fill it with data)... Here some of my discussions with Ibex develpoers: (I used my other github account :)
https://github.com/lowRISC/ibex/issues/1466
Thank you...
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