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Developer Handbook | ||
================== | ||
Extending | ||
========= | ||
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Command line tools and utilities | ||
-------------------------------- | ||
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A couple of command line tools and utilities help you working with RISC-V and | ||
can serve as entry point for extending this package. | ||
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Discover RISC-V ISA Variants: `riscv-describe-isa-variant` | ||
********************************************************** | ||
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.. argparse:: | ||
:module: riscvmodel.variant | ||
:func: describe_argparser | ||
:prog: riscv-describe-isa-variant | ||
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Describe a RISC-V ISA variant in a human-readable way. | ||
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Usage Example: | ||
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.. code:: console | ||
$ riscv-describe-isa-variant RV64GC | ||
RV64GC | ||
XLEN=64, 32 integer registers (I) | ||
Extensions: | ||
A Atomics | ||
C 16-bit Compressed Instructions | ||
D Double-Precision Floating-Point | ||
F Single-Precision Floating-Point | ||
M Integer Multiplication and Division | ||
Zicsr Control and Status Register Access | ||
Zifencei Instruction-Fetch Fence | ||
Generate a random instruction stream: `riscv-random-asm` | ||
******************************************************** | ||
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.. argparse:: | ||
:module: riscvmodel.random | ||
:func: gen_asm_parser | ||
:prog: riscv-random-asm | ||
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Generate a stream of random RISC-V instructions. Those sequences are valid | ||
instruction but not necessarily valid programs, in particular they don't | ||
have actual control flow. | ||
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Usage Example to generate 2 random RV32I instructions: | ||
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.. code:: console | ||
$ riscv-random-asm -v RV32I 2 | ||
sb x30, 943(x1) | ||
sra x0, x7, x7 | ||
Or restrict to one particular instruction: | ||
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.. code:: console | ||
$ riscv-random-asm -i or 5 | ||
or x0, x12, x11 | ||
or x13, x18, x0 | ||
or x8, x10, x30 | ||
or x2, x4, x2 | ||
or x0, x2, x27 |