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Add AArch64 support for singlepass. #713

Merged
merged 131 commits into from
Nov 22, 2019
Merged

Add AArch64 support for singlepass. #713

merged 131 commits into from
Nov 22, 2019

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losfair
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@losfair losfair commented Aug 22, 2019

This PR includes:

  • Support for AArch64 (ARM64) in Singlepass backend. Implemented with a combination of x86_64 instruction translation and native code generation.
  • State tracing and backtraces on AArch64/Singlepass. (Tiering is not implemented for this pair because there's no other backend supporting AArch64 yet)
  • Debugging tools: BlockTrace middleware, and support for reading states of previous WebAssembly stack frames from middlewares.

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losfair commented Nov 21, 2019

bors try

bors bot added a commit that referenced this pull request Nov 21, 2019
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bors bot commented Nov 22, 2019

try

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losfair commented Nov 22, 2019

bors try

bors bot added a commit that referenced this pull request Nov 22, 2019
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bors bot commented Nov 22, 2019

try

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losfair commented Nov 22, 2019

bors try

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bors bot commented Nov 22, 2019

try

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bors r+

bors bot added a commit that referenced this pull request Nov 22, 2019
713: Add AArch64 support for singlepass. r=syrusakbary a=losfair

This PR includes:

- Support for AArch64 (ARM64) in Singlepass backend. Implemented with a combination of x86_64 instruction translation and native code generation.
- State tracing and backtraces on AArch64/Singlepass. (Tiering is not implemented for this pair because there's no other backend supporting AArch64 yet)
- Debugging tools: `BlockTrace` middleware, and support for reading states of previous WebAssembly stack frames from middlewares.

Co-authored-by: losfair <zhy20000919@hotmail.com>
@wasmerio wasmerio deleted a comment from bors bot Nov 22, 2019
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bors bot commented Nov 22, 2019

Build succeeded

@bors bors bot merged commit 183dd32 into master Nov 22, 2019
@bors bors bot deleted the feature/singlepass-aarch64 branch November 22, 2019 19:00
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Looks pretty good to me! Though a PR this long is very hard to review -- I ended up skipping most of the code generation and translation changes 🤷‍♂ ; it'd be nice if changes like this could be merged in with 10-20 PRs of reasonable size

lib/runtime-core/src/backend.rs Show resolved Hide resolved
lib/runtime-core/src/backend.rs Show resolved Hide resolved
lib/runtime-core/src/backend.rs Show resolved Hide resolved
pub fn setjmp(env: *mut c_void) -> i32;
/// libc longjmp
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We depend on libc in runtime-core; is there a reason we aren't using the libc version?

const TRAP_STACK_SIZE: usize = 1048576; // 1MB

const SETJMP_BUFFER_LEN: usize = 27;
const SETJMP_BUFFER_LEN: usize = 128;
type SetJmpBuffer = [i32; SETJMP_BUFFER_LEN];
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repinging on this


FaultInfo {
faulting_addr: si_addr as usize as _,
ip: gregs[REG_RIP as usize] as _,
ip: std::mem::transmute::<&mut i64, &'static Cell<usize>>(&mut gregs[REG_RIP as usize]),
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I think this can probably cause undefined behavior but it's pretty subtle. The fact that a normal type in Rust exists that is being accessed with Cell or UnsafeCell is unsound. Cell by way of UnsafeCell is the only way to have aliased mutability in Rust without undefined behavior. This code allows aliased mutability where one side may be a Rust type without Cell or UnsafeCell. I believe that is undefined behavior.

lib/runtime-core/src/state.rs Show resolved Hide resolved
lib/runtime-core/src/state.rs Show resolved Hide resolved
&mut self.machine,
tmp_in,
-1.0,
18446744073709551616.0,
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⛳️
u64::max_value() as f64 (if this is the same, then I think it's more readable)

@@ -397,7 +403,7 @@ fn execute_wasm(options: &Run) -> Result<(), String> {
.map_err(|e| format!("Can't convert from wast to wasm: {:?}", e))?;
}

let compiler: Box<dyn Compiler> = match get_compiler_by_backend(options.backend) {
let compiler: Box<dyn Compiler> = match get_compiler_by_backend(options.backend, options) {
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repinging on this

bors bot added a commit that referenced this pull request Dec 17, 2019
1068: Various cleanups for the singlepass backend on AArch64. r=losfair a=losfair

ref: #713

Co-authored-by: losfair <zhy20000919@hotmail.com>
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5 participants