The sys_w11a_arty system is a w11a implementation for the Digilent Arty A7-35 board with DDR3 SDRAM support via a Vivado MIG core. For complete configuration, see sys_conf.vhd. The most important features are:
| Property | Value |
|---|---|
| CPU options | FPP: no; Cache: 32 kB |
| Memory | 3840 kB from DDR3 SDRAM via miglib_arty |
| Devices | DL11:2; DZ11, PC11, LP11, DEUNA, RK11, RL11, RHRP, TM11, IIST, KW11P, M9312: yes |
| Diagnostics | rbmon: yes; ibmon: yes; dmpcnt: yes; dmhbpt: 2; dmcmon: yes |
| Rlink | 12 Mbps via FT2232HQ based serial link |
An alternative design that uses only BRAM is available as sys_w11a_br_arty.
The board has only 4 LEDs plus 4 RGB-LEDS and offers only a compactified console light emulation. The memory size of 3840 kB allows starting all oskits.
For complete instructions on how to run operating system images, see w11a_os_guide. The default setup is:
SWI = 0110 (gives console light emulation...)
ti_w11 -tuD,12M,break,xon @<oskit-name>_boot.tcl
The Arty A7-35 board is one of the main w11 development platforms. The sys_w11a_arty design is often FPGA tested with ostest against all oskits.
- 2019-06-05: reduce clock to 72 MHz, Vivado 2919.1 fails with 75 MHz
- 2019-01-27: reduce clock to 75 MHz, Vivado 2918.3 fails with 80 MHz
- 2018-11-18: initial version, runs with 80 MHz using Vivado 2017.4