Skip to content

Commit

Permalink
Split voltage supply and sense.
Browse files Browse the repository at this point in the history
  • Loading branch information
whitequark committed Apr 16, 2018
1 parent 3a52203 commit 36b6687
Show file tree
Hide file tree
Showing 2 changed files with 23 additions and 25 deletions.
26 changes: 15 additions & 11 deletions hardware/glasgow.kicad_pcb
Expand Up @@ -6,7 +6,7 @@
(tracks 889)
(zones 0)
(modules 112)
(nets 108)
(nets 110)
)

(page A4)
Expand Down Expand Up @@ -195,6 +195,8 @@
(net 105 "Net-(C37-Pad1)")
(net 106 /~ENVA)
(net 107 /IOBufferA/ADR)
(net 108 /IOBufferA/VSUP)
(net 109 /IOBufferB/VSUP)

(net_class Default "This is the default net class."
(clearance 0.15)
Expand Down Expand Up @@ -223,6 +225,7 @@
(add_net /FLAGD)
(add_net /FPGA_DONE)
(add_net /IOBufferA/ADR)
(add_net /IOBufferA/VSUP)
(add_net /IOBufferA/VTG)
(add_net /IOBufferA/Y0)
(add_net /IOBufferA/Y1)
Expand All @@ -232,6 +235,7 @@
(add_net /IOBufferA/Y5)
(add_net /IOBufferA/Y6)
(add_net /IOBufferA/Y7)
(add_net /IOBufferB/VSUP)
(add_net /IOBufferB/VTG)
(add_net /IOBufferB/Y0)
(add_net /IOBufferB/Y1)
Expand Down Expand Up @@ -517,7 +521,7 @@
(pad 2 smd rect (at 0.8875 0) (size 0.995 1) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
(pad 1 smd rect (at -0.8875 0) (size 0.995 1) (layers F.Cu F.Paste F.Mask)
(net 76 /IOBufferB/VTG))
(net 109 /IOBufferB/VSUP))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
Expand Down Expand Up @@ -549,7 +553,7 @@
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd rect (at -0.8875 0) (size 0.995 1) (layers F.Cu F.Paste F.Mask)
(net 76 /IOBufferB/VTG))
(net 109 /IOBufferB/VSUP))
(pad 2 smd rect (at 0.8875 0) (size 0.995 1) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
Expand Down Expand Up @@ -753,7 +757,7 @@
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd rect (at -0.8875 0) (size 0.995 1) (layers F.Cu F.Paste F.Mask)
(net 77 /IOBufferA/VTG))
(net 108 /IOBufferA/VSUP))
(pad 2 smd rect (at 0.8875 0) (size 0.995 1) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
Expand Down Expand Up @@ -821,7 +825,7 @@
(effects (font (size 0.4 0.4) (thickness 0.06)))
)
(pad 1 smd rect (at -0.8875 0) (size 0.995 1) (layers F.Cu F.Paste F.Mask)
(net 77 /IOBufferA/VTG))
(net 108 /IOBufferA/VSUP))
(pad 2 smd rect (at 0.8875 0) (size 0.995 1) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl
Expand Down Expand Up @@ -966,7 +970,7 @@
(effects (font (size 0.5 0.5) (thickness 0.075)))
)
(pad 5 smd rect (at 1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
(net 77 /IOBufferA/VTG))
(net 108 /IOBufferA/VSUP))
(pad 4 smd rect (at 1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
(net 102 "Net-(R22-Pad2)"))
(pad 3 smd rect (at -1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
Expand Down Expand Up @@ -1017,7 +1021,7 @@
(pad 4 smd rect (at 1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
(net 99 "Net-(R27-Pad2)"))
(pad 5 smd rect (at 1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
(net 76 /IOBufferB/VTG))
(net 109 /IOBufferB/VSUP))
(model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23-5.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
Expand Down Expand Up @@ -1343,7 +1347,7 @@
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd rect (at 0.8875 0) (size 0.995 1) (layers F.Cu F.Paste F.Mask)
(net 77 /IOBufferA/VTG))
(net 108 /IOBufferA/VSUP))
(pad 1 smd rect (at -0.8875 0) (size 0.995 1) (layers F.Cu F.Paste F.Mask)
(net 102 "Net-(R22-Pad2)"))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
Expand Down Expand Up @@ -1479,7 +1483,7 @@
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(pad 2 smd rect (at 0.8875 0) (size 0.995 1) (layers F.Cu F.Paste F.Mask)
(net 76 /IOBufferB/VTG))
(net 109 /IOBufferB/VSUP))
(pad 1 smd rect (at -0.8875 0) (size 0.995 1) (layers F.Cu F.Paste F.Mask)
(net 99 "Net-(R27-Pad2)"))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl
Expand Down Expand Up @@ -3341,7 +3345,7 @@
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 74 /IOBufferA/Y0))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 77 /IOBufferA/VTG))
(net 108 /IOBufferA/VSUP))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 77 /IOBufferA/VTG))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_2x10_P2.54mm_Vertical.wrl
Expand Down Expand Up @@ -3385,7 +3389,7 @@
(pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 76 /IOBufferB/VTG))
(pad 2 thru_hole oval (at 2.54 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 76 /IOBufferB/VTG))
(net 109 /IOBufferB/VSUP))
(pad 3 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 59 /IOBufferB/Y0))
(pad 4 thru_hole oval (at 2.54 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
Expand Down
22 changes: 8 additions & 14 deletions hardware/glasgow_iobuf.sch
Expand Up @@ -149,8 +149,6 @@ Wire Wire Line
Connection ~ 4050 3650
Wire Wire Line
4050 3650 4050 3550
Wire Wire Line
4000 2750 4050 2750
Wire Wire Line
3450 2650 3450 2750
Wire Wire Line
Expand Down Expand Up @@ -566,9 +564,6 @@ F 3 "" H 4700 3450 50 0001 C CNN
$EndComp
Wire Wire Line
4700 3400 4700 3450
Wire Wire Line
4050 2650 4050 2750
Connection ~ 4050 2650
Wire Wire Line
4350 2650 4350 2700
Wire Wire Line
Expand All @@ -593,10 +588,6 @@ Wire Wire Line
Connection ~ 4350 3050
Wire Wire Line
4350 3050 4350 3100
Wire Wire Line
4050 2650 4200 2650
Wire Wire Line
3450 2650 4050 2650
Wire Wire Line
4700 3050 5700 3050
$Comp
Expand All @@ -613,15 +604,10 @@ F 4 "595-TPS73101DBVR" H 5500 4850 50 0001 C CNN "Mouser_PN"
1 5500 4850
1 0 0 -1
$EndComp
Wire Wire Line
4200 2650 4200 4400
Wire Wire Line
4200 4400 5950 4400
Wire Wire Line
5950 4750 5900 4750
Connection ~ 4200 2650
Wire Wire Line
4200 2650 4350 2650
$Comp
L power:GND #PWR0134
U 1 1 5B051FBC
Expand Down Expand Up @@ -866,4 +852,12 @@ Imax @ 3V3 = 35 mA\nImax @ Vtg = 35 mA
Wire Wire Line
6150 4750 6500 4750
Connection ~ 6150 4750
Wire Wire Line
3450 2650 4350 2650
Wire Wire Line
4200 2750 4200 4400
Wire Wire Line
4000 2750 4200 2750
Text Label 4300 4400 0 50 ~ 0
VSUP
$EndSCHEMATC

0 comments on commit 36b6687

Please sign in to comment.