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Writing to this register allows dividing (prescaling) the system clock by 1, 2, 4, 8, 16, 32, 64, 128 or 256. See table 8.16 in page 33 the datasheet.
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feat(clock): Clock Prescale (CLKPR) support #68
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close #68
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Writing to this register allows dividing (prescaling) the system clock by 1, 2, 4, 8, 16, 32, 64, 128 or 256. See table 8.16 in page 33 the datasheet.
The text was updated successfully, but these errors were encountered: