Disable smartEEE for Ethernet PHY as it causes spurious link down

Refer to http://www.trimslice.com/forum/viewtopic.php?f=73&t=1779
Many thanks to pepedog for pointing it

arch/arm/mach-mx6/board-cm-fx6.c

@@ -200,6 +200,16 @@ static int cm_fx6_fec_phy_init(struct phy_device *phydev)
 {
 	unsigned short val;
 
+	/* Ar8031 phy SmartEEE feature cause link status generates glitch,
+	* which cause ethernet link down/up issue, so disable SmartEEE
+	*/
+	phy_write(phydev, 0xd, 0x3);
+	phy_write(phydev, 0xe, 0x805d);
+	phy_write(phydev, 0xd, 0x4003);
+	val = phy_read(phydev, 0xe);
+	val &= ~(0x1 << 8);
+	phy_write(phydev, 0xe, val);
+
 	/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
 	phy_write(phydev, 0xd, 0x7);
 	phy_write(phydev, 0xe, 0x8016);