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Support for split declaration of Verilog ports #1589

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danilovesky merged 3 commits into workcraft:master from danilovesky:verilog-split-port

Mar 18, 2024

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danilovesky commented Mar 18, 2024

No description provided.

danilovesky added 3 commits

March 18, 2024 14:29


          Extractor of variables from Boolean expression

5d474a8


          Add MathModel method to get or create a node

6ebac2e


          Support split declaration of Verilog ports

b1f2217

Closes workcraft#1588

coveralls commented Mar 18, 2024

coverage: 69.185% (-0.5%) from 69.711%
when pulling b1f2217 on danilovesky:verilog-split-port
into 2f72037 on workcraft:master.

danilovesky merged commit 526096f into workcraft:master

18 checks passed

danilovesky deleted the verilog-split-port branch

March 18, 2024 14:56

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