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nios2_quartus2_project.qsf
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nios2_quartus2_project.qsf
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# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
# The default values for assignments are stored in the file
# nios2_quartus2_project_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
# assignment_defaults.qdf
# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
# Project-Wide Assignments
# ========================
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 5.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "08:30:26 DECEMBER 11, 2004"
set_global_assignment -name LAST_QUARTUS_VERSION 12.1
set_parameter -name MRAM_BYTEENA_LATCH ON
# Pin & Location Assignments
# ==========================
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL "<None>"
set_global_assignment -name FAMILY "Cyclone III"
set_global_assignment -name TOP_LEVEL_ENTITY nios2_quartus2_project
# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP3C16F484C6
set_global_assignment -name STRATIX_CONFIGURATION_SCHEME "FAST PASSIVE PARALLEL"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
# Assembler Assignments
# =====================
set_global_assignment -name GENERATE_TTF_FILE ON
# LogicLock Region Assignments
# ============================
# ---------------------------------------------
# start EDA_TOOL_SETTINGS(eda_design_synthesis)
# Analysis & Synthesis Assignments
# ================================
# end EDA_TOOL_SETTINGS(eda_design_synthesis)
# -------------------------------------------
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "1.8 V"
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
set_location_assignment PIN_G21 -to PLD_CLOCKINPUT
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PLD_CLOCKINPUT
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -entity DE0_TOP -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -entity DE0_TOP -section_id Top
set_global_assignment -name PARTITION_COLOR 14622752 -entity DE0_TOP -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -entity DE0_TOP -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -entity DE0_TOP -section_id "Root Region"
set_location_assignment PIN_G8 -to sdram_wire_cas_n
set_location_assignment PIN_G7 -to sdram_wire_cs_n
set_location_assignment PIN_E6 -to sdram_wire_cke
set_location_assignment PIN_B5 -to sdram_wire_ba[0]
set_location_assignment PIN_A4 -to sdram_wire_ba[1]
set_location_assignment PIN_F10 -to sdram_wire_dq[15]
set_location_assignment PIN_E10 -to sdram_wire_dq[14]
set_location_assignment PIN_A10 -to sdram_wire_dq[13]
set_location_assignment PIN_B10 -to sdram_wire_dq[12]
set_location_assignment PIN_C10 -to sdram_wire_dq[11]
set_location_assignment PIN_A9 -to sdram_wire_dq[10]
set_location_assignment PIN_B9 -to sdram_wire_dq[9]
set_location_assignment PIN_A8 -to sdram_wire_dq[8]
set_location_assignment PIN_F8 -to sdram_wire_dq[7]
set_location_assignment PIN_H9 -to sdram_wire_dq[6]
set_location_assignment PIN_G9 -to sdram_wire_dq[5]
set_location_assignment PIN_F9 -to sdram_wire_dq[4]
set_location_assignment PIN_E9 -to sdram_wire_dq[3]
set_location_assignment PIN_H10 -to sdram_wire_dq[2]
set_location_assignment PIN_G10 -to sdram_wire_dq[1]
set_location_assignment PIN_D10 -to sdram_wire_dq[0]
set_location_assignment PIN_E7 -to sdram_wire_dqm[0]
set_location_assignment PIN_B8 -to sdram_wire_dqm[1]
set_location_assignment PIN_F7 -to sdram_wire_ras_n
set_location_assignment PIN_D6 -to sdram_wire_we_n
set_location_assignment PIN_A7 -to sdram_wire_addr[11]
set_location_assignment PIN_B4 -to sdram_wire_addr[10]
set_location_assignment PIN_B7 -to sdram_wire_addr[9]
set_location_assignment PIN_C7 -to sdram_wire_addr[8]
set_location_assignment PIN_A6 -to sdram_wire_addr[7]
set_location_assignment PIN_B6 -to sdram_wire_addr[6]
set_location_assignment PIN_C6 -to sdram_wire_addr[5]
set_location_assignment PIN_A5 -to sdram_wire_addr[4]
set_location_assignment PIN_C3 -to sdram_wire_addr[3]
set_location_assignment PIN_B3 -to sdram_wire_addr[2]
set_location_assignment PIN_A3 -to sdram_wire_addr[1]
set_location_assignment PIN_C4 -to sdram_wire_addr[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[8]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[9]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[10]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[11]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[12]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[13]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[14]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[15]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_cs_n
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_cke
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_cas_n
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_ba[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_ba[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_addr[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_addr[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_addr[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_addr[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_addr[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_addr[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_addr[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_addr[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_addr[8]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_addr[9]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_addr[10]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_addr[11]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_we_n
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dqm[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_ras_n
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dqm[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_wire_dq
set_location_assignment PIN_E5 -to sdram_clk_out
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sdram_clk_out
set_location_assignment PIN_B1 -to leds[9]
set_location_assignment PIN_B2 -to leds[8]
set_location_assignment PIN_C2 -to leds[7]
set_location_assignment PIN_C1 -to leds[6]
set_location_assignment PIN_E1 -to leds[5]
set_location_assignment PIN_F2 -to leds[4]
set_location_assignment PIN_H1 -to leds[3]
set_location_assignment PIN_J3 -to leds[2]
set_location_assignment PIN_J2 -to leds[1]
set_location_assignment PIN_J1 -to leds[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to leds[9]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to leds[8]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to leds[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to leds[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to leds[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to leds[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to leds[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to leds[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to leds[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to leds[0]
set_location_assignment PIN_AB16 -to pwm_1
set_location_assignment PIN_AA16 -to pwm_2
set_location_assignment PIN_AB15 -to pwm_3
set_location_assignment PIN_AB14 -to pwm_4
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to pwm_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to pwm_2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to pwm_3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to pwm_4
set_global_assignment -name SEARCH_PATH first_nios2_system/synthesis/ -tag from_archive
set_global_assignment -name SEARCH_PATH first_nios2_system/synthesis/submodules/ -tag from_archive
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to lcd_data[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to lcd_data[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to lcd_data[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to lcd_data[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to lcd_data[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to lcd_data[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to lcd_data[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to lcd_data[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to lcd_E
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to lcd_RS
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to lcd_RW
set_location_assignment PIN_C20 -to lcd_data[7]
set_location_assignment PIN_D20 -to lcd_data[6]
set_location_assignment PIN_B21 -to lcd_data[5]
set_location_assignment PIN_B22 -to lcd_data[4]
set_location_assignment PIN_C21 -to lcd_data[3]
set_location_assignment PIN_C22 -to lcd_data[2]
set_location_assignment PIN_D21 -to lcd_data[1]
set_location_assignment PIN_D22 -to lcd_data[0]
set_location_assignment PIN_E21 -to lcd_E
set_location_assignment PIN_F22 -to lcd_RS
set_location_assignment PIN_E22 -to lcd_RW
set_location_assignment PIN_AB9 -to keypad_out_rows[3]
set_location_assignment PIN_V15 -to keypad_out_rows[2]
set_location_assignment PIN_T15 -to keypad_out_rows[1]
set_location_assignment PIN_W17 -to keypad_out_rows[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to keypad_out_rows[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to keypad_out_rows[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to keypad_out_rows[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to keypad_out_rows[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to keypad_out_cols[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to keypad_out_cols[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to keypad_out_cols[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to keypad_out_cols[3]
set_location_assignment PIN_T12 -to keypad_out_cols[3]
set_location_assignment PIN_R14 -to keypad_out_cols[2]
set_location_assignment PIN_AB7 -to keypad_out_cols[1]
set_location_assignment PIN_AA9 -to keypad_out_cols[0]
set_global_assignment -name SEARCH_PATH ip/euler/ -tag from_archive
set_global_assignment -name SEARCH_PATH ip/keypad/ -tag from_archive
set_global_assignment -name SEARCH_PATH ip/pwm_component/ -tag from_archive
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name QIP_FILE first_nios2_system/synthesis/first_nios2_system.qip
set_global_assignment -name SDC_FILE hw_dev_tutorial.sdc
set_global_assignment -name BDF_FILE nios2_quartus2_project.bdf
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top