Multiple

- Complete initial support for Karl's Z280 module w/ 512K RAM/ROM module - Allow swapping Z180 serial ports via ASCISWAP config variable - Fix Z180 include file per Issue #141 from J.B. Lang
wwarthen · Jun 6, 2020 · 8ef4456 · 8ef4456
1 parent e1145f5
commit 8ef4456
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diff --git a/Binary/RomList.txt b/Binary/RomList.txt
@@ -182,6 +182,23 @@ RCZ180 (RCZ180_nat.rom & RCZ180_ext.rom):
    - RCZ180_ext.rom uses external bank management to access
      memory, such as the 512K RAM/ROM module.
 
+RCZ280 (RCZ280_ext.rom):
+ *** Experimental ***
+ - Assumes CPU oscillator of 24 MHz
+ - Bus clock will be 6 MHz, so does not match RC2014 standard!!!
+ - Requires 512K RAM/ROM module
+ - Auto detects Serial I/O Module (ACIA), Dual Serial
+   Module (SIO/2), and EP Dual UART.
+ - Console on whichever serial module is installed,
+   order of priority is UART, SIO, then ACIA.
+ - Baud rate is determined by hardware, but normally 115200.
+ - Auto support for RC2014 Compact Flash Module
+ - Auto support for RC2014 PPIDE Module
+ - Support for Scott Baker SIO board may be enabled in config
+ - Support for Scott Baker floppy controllers (SMC & WDC) may
+   be enabled in config
+ - Support for J.B. Lang TMS9918 video card may be enabled in config
+
 SCZ180 (SCZ180_126.rom, SCZ180_130.rom, SCZ180_131.rom):
  - Same as RCZ180
  - Adds auto support for SPI SD Card

diff --git a/Doc/ChangeLog.txt b/Doc/ChangeLog.txt
@@ -5,6 +5,7 @@ Version 3.1.1
 - WBW: Change Propeller VGA signal timings to 60Hz refresh
 - WBW: Enhanced SYSTEM RESET function to allow a warm start back to boot loader
 - C?O: Add DUART driver
+- WBW: Early Z280 support (requires 512K RAM/ROM board)
 
 Version 3.1
 -----------

diff --git a/Source/HBIOS/Build.ps1 b/Source/HBIOS/Build.ps1
@@ -19,7 +19,7 @@ param([string]$Platform = "", [string]$Config = "", [string]$RomSize = "512", [s
 # setup mechanism so that multiple configuration are not needed.  When building for UNA, the pre-built
 # UNA BIOS is simply imbedded, it is not built here.
 #
-$PlatformListZ80 = "SBC", "ZETA", "ZETA2", "RCZ80", "EZZ80", "UNA"
+$PlatformListZ80 = "SBC", "ZETA", "ZETA2", "RCZ80", "RCZ280", "EZZ80", "UNA"
 $PlatformListZ180 = "N8", "MK4", "RCZ180", "SCZ180", "DYNO"
 
 #

diff --git a/Source/HBIOS/Config/RCZ280_ext.asm b/Source/HBIOS/Config/RCZ280_ext.asm
@@ -0,0 +1,39 @@
+;
+;==================================================================================================
+;   RC2014 Z280 STANDARD CONFIGURATION (EXTERNAL 512K RAM/ROM BANKED MEMORY MODULE)
+;==================================================================================================
+;
+; THE COMPLETE SET OF DEFAULT CONFIGURATION SETTINGS FOR THIS PLATFORM ARE FOUND IN THE
+; CFG_<PLT>.ASM INCLUDED FILE WHICH IS FOUND IN THE PARENT DIRECTORY.  THIS FILE CONTAINS
+; COMMON CONFIGURATION SETTINGS THAT OVERRIDE THE DEFAULTS.  IT IS INTENDED THAT YOU MAKE
+; YOUR CUSTOMIZATIONS IN THIS FILE AND JUST INHERIT ALL OTHER SETTINGS FROM THE DEFAULTS.
+; EVEN BETTER, YOU CAN MAKE A COPY OF THIS FILE WITH A NAME LIKE <PLT>_XXX.ASM AND SPECIFY
+; YOUR FILE IN THE BUILD PROCESS.
+;
+; THE SETTINGS BELOW ARE THE SETTINGS THAT ARE MOST COMMONLY MODIFIED FOR THIS PLATFORM.
+; MANY OF THEM ARE EQUAL TO THE SETTINGS IN THE INCLUDED FILE, SO THEY DON'T REALLY DO
+; ANYTHING AS IS.  THEY ARE LISTED HERE TO MAKE IT EASY FOR YOU TO ADJUST THE MOST COMMON
+; SETTINGS.
+;
+; N.B., SINCE THE SETTINGS BELOW ARE REDEFINING VALUES ALREADY SET IN THE INCLUDED FILE,
+; TASM INSISTS THAT YOU USE THE .SET OPERATOR AND NOT THE .EQU OPERATOR BELOW. ATTEMPTING
+; TO REDEFINE A VALUE WITH .EQU BELOW WILL CAUSE TASM ERRORS!
+;
+; PLEASE REFER TO THE CUSTOM BUILD INSTRUCTIONS (README.TXT) IN THE SOURCE DIRECTORY (TWO
+; DIRECTORIES ABOVE THIS ONE).
+;
+#define	BOOT_DEFAULT	"H"		; DEFAULT BOOT LOADER CMD ON <CR> OR AUTO BOOT
+;
+#include "cfg_rcz280.asm"
+;
+CPUOSC		.SET	7372800		; CPU OSC FREQ IN MHZ
+;
+INTMODE		.SET	1
+;
+UARTENABLE	.SET	TRUE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
+ACIAENABLE	.SET	TRUE		; ACIA: ENABLE MOTOROLA 6850 ACIA DRIVER (ACIA.ASM)
+SIOENABLE	.SET	TRUE		; SIO: ENABLE ZILOG SIO SERIAL DRIVER (SIO.ASM)
+;
+IDEENABLE	.SET	TRUE		; IDE: ENABLE IDE DISK DRIVER (IDE.ASM)
+;
+PPIDEENABLE	.SET	TRUE		; PPIDE: ENABLE PARALLEL PORT IDE DISK DRIVER (PPIDE.ASM)
diff --git a/Source/HBIOS/Makefile b/Source/HBIOS/Makefile
@@ -11,6 +11,7 @@ else
 	OBJECTS += N8_std.rom N8_std.com
 	OBJECTS += RCZ180_ext.rom RCZ180_ext.com
 	OBJECTS += RCZ180_nat.rom RCZ180_nat.com
+	OBJECTS += RCZ280_ext.rom RCZ280_ext.com
 	OBJECTS += RCZ80_kio.rom RCZ80_kio.com
 	OBJECTS += RCZ80_mt.rom RCZ80_mt.com
 	OBJECTS += RCZ80_duart.rom RCZ80_duart.com

diff --git a/Source/HBIOS/asci.asm b/Source/HBIOS/asci.asm
@@ -796,8 +796,32 @@ ASCI1_BUFSZ	.EQU	$ - ASCI1_BUF	; SIZE OF RING BUFFER
 ;
 ASCI_CFG:
 ;
+#IF (ASCISWAP)
+;
+ASCI1_CFG:
+	; ASCI CHANNEL B CONFIG
+	.DB	0			; DEVICE NUMBER (SET DURING INIT)
+	.DB	0			; ASCI TYPE (SET DURING INIT)
+	.DB	1			; MODULE ID
+	.DB	ASCI1_BASE		; BASE PORT
+	.DW	ASCI1CFG		; LINE CONFIGURATION
+	.DW	ASCI1_RCVBUF		; POINTER TO RCV BUFFER STRUCT
+;
+ASCI_CFGSIZ	.EQU	$ - ASCI_CFG	; SIZE OF ONE CFG TABLE ENTRY
+;
+ASCI0_CFG:
+	; ASCI CHANNEL A CONFIG
+	.DB	0			; DEVICE NUMBER (SET DURING INIT)
+	.DB	0			; ASCI TYPE (SET DURING INIT)
+	.DB	0			; MODULE ID
+	.DB	ASCI0_BASE		; BASE PORT
+	.DW	ASCI0CFG		; LINE CONFIGURATION
+	.DW	ASCI0_RCVBUF		; POINTER TO RCV BUFFER STRUCT
+;
+#ELSE
+;
 ASCI0_CFG:
-	; ASCI MODULE A CONFIG
+	; ASCI CHANNEL A CONFIG
 	.DB	0			; DEVICE NUMBER (SET DURING INIT)
 	.DB	0			; ASCI TYPE (SET DURING INIT)
 	.DB	0			; MODULE ID
@@ -808,12 +832,15 @@ ASCI0_CFG:
 ASCI_CFGSIZ	.EQU	$ - ASCI_CFG	; SIZE OF ONE CFG TABLE ENTRY
 ;
 ASCI1_CFG:
-	; ASCI MODULE B CONFIG
+	; ASCI CHANNEL B CONFIG
 	.DB	0			; DEVICE NUMBER (SET DURING INIT)
 	.DB	0			; ASCI TYPE (SET DURING INIT)
 	.DB	1			; MODULE ID
 	.DB	ASCI1_BASE		; BASE PORT
 	.DW	ASCI1CFG		; LINE CONFIGURATION
 	.DW	ASCI1_RCVBUF		; POINTER TO RCV BUFFER STRUCT
 ;
+#ENDIF
+;
+;
 ASCI_CFGCNT	.EQU	($ - ASCI_CFG) / ASCI_CFGSIZ
diff --git a/Source/HBIOS/cfg_dyno.asm b/Source/HBIOS/cfg_dyno.asm
@@ -14,7 +14,7 @@
 #DEFINE PLATFORM_NAME "DYNO"
 ;
 PLATFORM	.EQU	PLT_DYNO	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
-CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180]
+CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -79,6 +79,7 @@ DUARTENABLE	.EQU	FALSE		; DUART: ENABLE 2681/2692 SERIAL DRIVER (DUART.ASM)
 UARTENABLE	.EQU	FALSE		; UART: ENABLE 8250/16550-LIKE SERIAL DRIVER (UART.ASM)
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
 ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
 ASCI1CFG	.EQU	DEFSERCFG	; ASCI 1: SERIAL LINE CONFIG
 ;

diff --git a/Source/HBIOS/cfg_ezz80.asm b/Source/HBIOS/cfg_ezz80.asm
@@ -14,7 +14,7 @@
 #DEFINE PLATFORM_NAME "EASYZ80"
 ;
 PLATFORM	.EQU	PLT_EZZ80	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
-CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180]
+CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)

diff --git a/Source/HBIOS/cfg_master.asm b/Source/HBIOS/cfg_master.asm
@@ -11,7 +11,7 @@
 #DEFINE PLATFORM_NAME "ROMWBW"
 ;
 PLATFORM	.EQU	PLT_SBC		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
-CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180]
+CPUFAM		.EQU	CPU_Z80		; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -40,6 +40,9 @@ Z180_CLKDIV	.EQU	1		; Z180: CHK DIV: 0=OSC/2, 1=OSC, 2=OSC*2
 Z180_MEMWAIT	.EQU	0		; Z180: MEMORY WAIT STATES (0-3)
 Z180_IOWAIT	.EQU	1		; Z180: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
 ;
+Z280_MEMWAIT	.EQU	0		; Z280: MEMORY WAIT STATES (0-3)
+Z280_IOWAIT	.EQU	1		; Z280: I/O WAIT STATES TO ADD ABOVE 1 W/S BUILT-IN (0-3)
+;
 N8_PPI0		.EQU	$80		; N8: FIRST PARALLEL PORT REGISTERS BASE ADR
 N8_PPI1		.EQU	$84		; N8: SECOND PARALLEL PORT REGISTERS BASE ADR
 N8_RTC		.EQU	$88		; N8: RTC LATCH REGISTER ADR
@@ -119,6 +122,7 @@ UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 ;
 ASCIENABLE	.EQU	FALSE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
 ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
 ASCI1CFG	.EQU	DEFSERCFG	; ASCI 1: SERIAL LINE CONFIG
 ;

diff --git a/Source/HBIOS/cfg_mk4.asm b/Source/HBIOS/cfg_mk4.asm
@@ -14,7 +14,7 @@
 #DEFINE PLATFORM_NAME "MARK IV"
 ;
 PLATFORM	.EQU	PLT_MK4		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
-CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180]
+CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -94,6 +94,7 @@ UART4		.EQU	TRUE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
 ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
 ASCI1CFG	.EQU	DEFSERCFG	; ASCI 1: SERIAL LINE CONFIG
 ;

diff --git a/Source/HBIOS/cfg_n8.asm b/Source/HBIOS/cfg_n8.asm
@@ -14,7 +14,7 @@
 #DEFINE PLATFORM_NAME "N8"
 ;
 PLATFORM	.EQU	PLT_N8		; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
-CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180]
+CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -97,6 +97,7 @@ UART4		.EQU	TRUE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	FALSE		; UART: AUTO-DETECT RC UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
 ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
 ASCI1CFG	.EQU	DEFSERCFG	; ASCI 1: SERIAL LINE CONFIG
 ;

diff --git a/Source/HBIOS/cfg_rcz180.asm b/Source/HBIOS/cfg_rcz180.asm
@@ -14,7 +14,7 @@
 #DEFINE PLATFORM_NAME "RC2014"
 ;
 PLATFORM	.EQU	PLT_RCZ180	; PLT_[SBC|ZETA|ZETA2|N8|MK4|UNA|RCZ80|RCZ180|EZZ80|SCZ180|DYNO]
-CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180]
+CPUFAM		.EQU	CPU_Z180	; CPU FAMILY: CPU_[Z80|Z180|Z280]
 BIOS		.EQU	BIOS_WBW	; HARDWARE BIOS: BIOS_[WBW|UNA]
 BATCOND		.EQU	FALSE		; ENABLE LOW BATTERY WARNING MESSAGE
 HBIOS_MUTEX	.EQU	FALSE		; ENABLE REENTRANT CALLS TO HBIOS (ADDS OVERHEAD)
@@ -96,6 +96,7 @@ UART4		.EQU	FALSE		; UART: AUTO-DETECT 4UART UART
 UARTRC		.EQU	TRUE		; UART: AUTO-DETECT RC UART
 ;
 ASCIENABLE	.EQU	TRUE		; ASCI: ENABLE Z180 ASCI SERIAL DRIVER (ASCI.ASM)
+ASCISWAP	.EQU	FALSE		; ASCI: SWAP CHANNELS
 ASCI0CFG	.EQU	DEFSERCFG	; ASCI 0: SERIAL LINE CONFIG
 ASCI1CFG	.EQU	DEFSERCFG	; ASCI 1: SERIAL LINE CONFIG
 ;