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amd-xgbe: TX Flow Ctrl Registers are h/w ver dependent
[ Upstream commit 579923d ] There is difference in the TX Flow Control registers (TFCR) between the revisions of the hardware. The older revisions of hardware used to have single register per queue. Whereas, the newer revision of hardware (from ver 30H onwards) have one register per priority. Update the driver to use the TFCR based on the reported version of the hardware. Fixes: c5aa9e3 ("amd-xgbe: Initial AMD 10GbE platform driver") Co-developed-by: Ajith Nayak <Ajith.Nayak@amd.com> Signed-off-by: Ajith Nayak <Ajith.Nayak@amd.com> Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> Acked-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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