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arm64: dts: marvell: add DT for ESPRESSObin-Ultra
This adds support for ESPRESSObin-Ultra from Globalscale. Specifications are similar to the base ESPRESSObin board, with main difference being being WAN port with PoE capability and 2 additional ethernet ports. Full specifications: 1x Marvell 64 bit Dual Core ARM A53 Armada 3700 SOC clocked up to 1.2Ghz 1x Topaz 6341 Networking Switch 1GB DDR4 8GB eMMC 1x WAN with 30W POE 4x Gb LAN 1x RTC Clock and battery 1x DC Jack 1x USB 3.0 Type A 1x USB 2.0 Type A 1x SIM NanoSIM card Slot 1x Power Button 4x LED 1x Reset button 1x microUSB for UART 1x M.2 2280 slot for memory 1x 2x2 802.11ac Wi-Fi 1x MiniPCIE slot for Wi-Fi (PCIe interface) Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
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| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
| /* | ||
| * Device Tree file for ESPRESSObin-Ultra board. | ||
| * Copyright (C) 2019 Globalscale technologies, Inc. | ||
| * | ||
| * Jason Hung <jhung@globalscaletechnologies.com> | ||
| */ | ||
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| /dts-v1/; | ||
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| #include "armada-3720-espressobin.dtsi" | ||
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| / { | ||
| model = "Globalscale Marvell ESPRESSOBin Ultra Board"; | ||
| compatible = "globalscale,espressobin-ultra", "marvell,armada3720", | ||
| "marvell,armada3710"; | ||
|
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| aliases { | ||
| /* ethernet1 is WAN port */ | ||
| ethernet1 = &switch0port5; | ||
| ethernet2 = &switch0port1; | ||
| ethernet3 = &switch0port2; | ||
| ethernet4 = &switch0port3; | ||
| ethernet5 = &switch0port4; | ||
| }; | ||
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| reg_usb3_vbus: usb3-vbus { | ||
| compatible = "regulator-fixed"; | ||
| regulator-name = "usb3-vbus"; | ||
| regulator-min-microvolt = <5000000>; | ||
| regulator-max-microvolt = <5000000>; | ||
| enable-active-high; | ||
| gpio = <&gpionb 19 GPIO_ACTIVE_HIGH>; | ||
| }; | ||
|
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| usb3_phy: usb3-phy { | ||
| compatible = "usb-nop-xceiv"; | ||
| vcc-supply = <®_usb3_vbus>; | ||
| }; | ||
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| gpio-leds { | ||
| pinctrl-names = "default"; | ||
| compatible = "gpio-leds"; | ||
| /* No assigned functions to the LEDs by default */ | ||
| led1 { | ||
| label = "ebin-ultra:blue:led1"; | ||
| gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; | ||
| }; | ||
| led2 { | ||
| label = "ebin-ultra:green:led2"; | ||
| gpios = <&gpionb 12 GPIO_ACTIVE_LOW>; | ||
| }; | ||
| led3 { | ||
| label = "ebin-ultra:red:led3"; | ||
| gpios = <&gpionb 13 GPIO_ACTIVE_LOW>; | ||
| }; | ||
| led4 { | ||
| label = "ebin-ultra:yellow:led4"; | ||
| gpios = <&gpionb 14 GPIO_ACTIVE_LOW>; | ||
| }; | ||
| }; | ||
| }; | ||
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| &sdhci0 { | ||
| status = "okay"; | ||
| }; | ||
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| &sdhci1 { | ||
| status = "disabled"; | ||
| }; | ||
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| &spi0 { | ||
| flash@0 { | ||
| spi-max-frequency = <108000000>; | ||
| spi-rx-bus-width = <4>; | ||
| spi-tx-bus-width = <4>; | ||
|
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| partitions { | ||
| compatible = "fixed-partitions"; | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
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| partition@0 { | ||
| label = "firmware"; | ||
| reg = <0x0 0x3e0000>; | ||
| }; | ||
| partition@3e0000 { | ||
| label = "hw-info"; | ||
| reg = <0x3e0000 0x10000>; | ||
| read-only; | ||
| }; | ||
| partition@3f0000 { | ||
| label = "u-boot-env"; | ||
| reg = <0x3f0000 0x10000>; | ||
| }; | ||
| }; | ||
| }; | ||
| }; | ||
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| &i2c0 { | ||
| status = "okay"; | ||
| pinctrl-names = "default"; | ||
| pinctrl-0 = <&i2c1_pins>; | ||
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| clock-frequency = <100000>; | ||
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| rtc@51 { | ||
| compatible = "nxp,pcf8563"; | ||
| reg = <0x51>; | ||
| }; | ||
| }; | ||
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| &usb3 { | ||
| usb-phy = <&usb3_phy>; | ||
| status = "disabled"; | ||
| }; | ||
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| &mdio { | ||
| extphy: ethernet-phy@1 { | ||
| reg = <1>; | ||
| }; | ||
| }; | ||
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| &switch0 { | ||
| reg = <3>; | ||
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| ports { | ||
| switch0port1: port@1 { | ||
| reg = <1>; | ||
| label = "lan0"; | ||
| phy-handle = <&switch0phy0>; | ||
| }; | ||
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| switch0port2: port@2 { | ||
| reg = <2>; | ||
| label = "lan1"; | ||
| phy-handle = <&switch0phy1>; | ||
| }; | ||
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| switch0port3: port@3 { | ||
| reg = <3>; | ||
| label = "lan2"; | ||
| phy-handle = <&switch0phy2>; | ||
| }; | ||
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| switch0port4: port@4 { | ||
| reg = <4>; | ||
| label = "lan3"; | ||
| phy-handle = <&switch0phy3>; | ||
| }; | ||
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| switch0port5: port@5 { | ||
| reg = <5>; | ||
| label = "wan"; | ||
| phy-handle = <&extphy>; | ||
| phy-mode = "sgmii"; | ||
| }; | ||
| }; | ||
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| mdio { | ||
| switch0phy3: switch0phy3@14 { | ||
| reg = <0x14>; | ||
| }; | ||
| }; | ||
| }; |