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x86: Add straight-line-speculation mitigation
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[ Upstream commit e463a09 ]

Make use of an upcoming GCC feature to mitigate
straight-line-speculation for x86:

  https://gcc.gnu.org/g:53a643f8568067d7700a9f2facc8ba39974973d3
  https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102952
  https://bugs.llvm.org/show_bug.cgi?id=52323

It's built tested on x86_64-allyesconfig using GCC-12 and GCC-11.

Maintenance overhead of this should be fairly low due to objtool
validation.

Size overhead of all these additional int3 instructions comes to:

     text	   data	    bss	    dec	    hex	filename
  22267751	6933356	2011368	31212475	1dc43bb	defconfig-build/vmlinux
  22804126	6933356	1470696	31208178	1dc32f2	defconfig-build/vmlinux.sls

Or roughly 2.4% additional text.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20211204134908.140103474@infradead.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Peter Zijlstra authored and gregkh committed May 15, 2022
1 parent d11f96d commit 370d33d
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Showing 10 changed files with 38 additions and 7 deletions.
12 changes: 12 additions & 0 deletions arch/x86/Kconfig
Expand Up @@ -468,6 +468,18 @@ config RETPOLINE
branches. Requires a compiler with -mindirect-branch=thunk-extern
support for full protection. The kernel may run slower.

config CC_HAS_SLS
def_bool $(cc-option,-mharden-sls=all)

config SLS
bool "Mitigate Straight-Line-Speculation"
depends on CC_HAS_SLS && X86_64
default n
help
Compile the kernel with straight-line-speculation options to guard
against straight line speculation. The kernel image might be slightly
larger.

config X86_CPU_RESCTRL
bool "x86 CPU resource control support"
depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD)
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4 changes: 4 additions & 0 deletions arch/x86/Makefile
Expand Up @@ -179,6 +179,10 @@ ifdef CONFIG_RETPOLINE
endif
endif

ifdef CONFIG_SLS
KBUILD_CFLAGS += -mharden-sls=all
endif

KBUILD_LDFLAGS += -m elf_$(UTS_MACHINE)

ifdef CONFIG_LTO_CLANG
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10 changes: 10 additions & 0 deletions arch/x86/include/asm/linkage.h
Expand Up @@ -18,9 +18,19 @@
#define __ALIGN_STR __stringify(__ALIGN)
#endif

#ifdef CONFIG_SLS
#define RET ret; int3
#else
#define RET ret
#endif

#else /* __ASSEMBLY__ */

#ifdef CONFIG_SLS
#define ASM_RET "ret; int3\n\t"
#else
#define ASM_RET "ret\n\t"
#endif

#endif /* __ASSEMBLY__ */

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2 changes: 1 addition & 1 deletion arch/x86/include/asm/static_call.h
Expand Up @@ -35,7 +35,7 @@
__ARCH_DEFINE_STATIC_CALL_TRAMP(name, ".byte 0xe9; .long " #func " - (. + 4)")

#define ARCH_DEFINE_STATIC_CALL_NULL_TRAMP(name) \
__ARCH_DEFINE_STATIC_CALL_TRAMP(name, "ret; nop; nop; nop; nop")
__ARCH_DEFINE_STATIC_CALL_TRAMP(name, "ret; int3; nop; nop; nop")


#define ARCH_ADD_TRAMP_KEY(name) \
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2 changes: 1 addition & 1 deletion arch/x86/kernel/ftrace.c
Expand Up @@ -308,7 +308,7 @@ union ftrace_op_code_union {
} __attribute__((packed));
};

#define RET_SIZE 1
#define RET_SIZE 1 + IS_ENABLED(CONFIG_SLS)

static unsigned long
create_trampoline(struct ftrace_ops *ops, unsigned int *tramp_size)
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5 changes: 3 additions & 2 deletions arch/x86/kernel/static_call.c
Expand Up @@ -16,6 +16,8 @@ enum insn_type {
*/
static const u8 xor5rax[] = { 0x2e, 0x2e, 0x2e, 0x31, 0xc0 };

static const u8 retinsn[] = { RET_INSN_OPCODE, 0xcc, 0xcc, 0xcc, 0xcc };

static void __ref __static_call_transform(void *insn, enum insn_type type, void *func)
{
const void *emulate = NULL;
Expand All @@ -41,8 +43,7 @@ static void __ref __static_call_transform(void *insn, enum insn_type type, void
break;

case RET:
code = text_gen_insn(RET_INSN_OPCODE, insn, func);
size = RET_INSN_SIZE;
code = &retinsn;
break;
}

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2 changes: 1 addition & 1 deletion arch/x86/lib/memmove_64.S
Expand Up @@ -40,7 +40,7 @@ SYM_FUNC_START(__memmove)
/* FSRM implies ERMS => no length checks, do the copy directly */
.Lmemmove_begin_forward:
ALTERNATIVE "cmp $0x20, %rdx; jb 1f", "", X86_FEATURE_FSRM
ALTERNATIVE "", "movq %rdx, %rcx; rep movsb; RET", X86_FEATURE_ERMS
ALTERNATIVE "", __stringify(movq %rdx, %rcx; rep movsb; RET), X86_FEATURE_ERMS

/*
* movsq instruction have many startup latency
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2 changes: 1 addition & 1 deletion arch/x86/lib/retpoline.S
Expand Up @@ -34,7 +34,7 @@ SYM_FUNC_START(__x86_indirect_thunk_\reg)

ALTERNATIVE_2 __stringify(ANNOTATE_RETPOLINE_SAFE; jmp *%\reg), \
__stringify(RETPOLINE \reg), X86_FEATURE_RETPOLINE, \
__stringify(lfence; ANNOTATE_RETPOLINE_SAFE; jmp *%\reg), X86_FEATURE_RETPOLINE_LFENCE
__stringify(lfence; ANNOTATE_RETPOLINE_SAFE; jmp *%\reg; int3), X86_FEATURE_RETPOLINE_LFENCE

SYM_FUNC_END(__x86_indirect_thunk_\reg)

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3 changes: 2 additions & 1 deletion scripts/Makefile.build
Expand Up @@ -232,7 +232,8 @@ objtool_args = \
$(if $(CONFIG_GCOV_KERNEL)$(CONFIG_LTO_CLANG), --no-unreachable)\
$(if $(CONFIG_RETPOLINE), --retpoline) \
$(if $(CONFIG_X86_SMAP), --uaccess) \
$(if $(CONFIG_FTRACE_MCOUNT_USE_OBJTOOL), --mcount)
$(if $(CONFIG_FTRACE_MCOUNT_USE_OBJTOOL), --mcount) \
$(if $(CONFIG_SLS), --sls)

ifndef CONFIG_LTO_CLANG

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3 changes: 3 additions & 0 deletions scripts/link-vmlinux.sh
Expand Up @@ -139,6 +139,9 @@ objtool_link()
if [ -n "${CONFIG_X86_SMAP}" ]; then
objtoolopt="${objtoolopt} --uaccess"
fi
if [ -n "${CONFIG_SLS}" ]; then
objtoolopt="${objtoolopt} --sls"
fi
info OBJTOOL ${1}
tools/objtool/objtool ${objtoolcmd} ${objtoolopt} ${1}
fi
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