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Merge tag 'v5.10.47' into 5.10
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Linux 5.10.47
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xanmod committed Jun 30, 2021
2 parents 8f476f5 + 4357ae2 commit 45bbc94
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Showing 104 changed files with 1,241 additions and 559 deletions.
2 changes: 1 addition & 1 deletion Makefile
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 5
PATCHLEVEL = 10
SUBLEVEL = 46
SUBLEVEL = 47
EXTRAVERSION =
NAME = Dare mighty things

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16 changes: 9 additions & 7 deletions arch/arm/kernel/setup.c
Expand Up @@ -544,9 +544,11 @@ void notrace cpu_init(void)
* In Thumb-2, msr with an immediate value is not allowed.
*/
#ifdef CONFIG_THUMB2_KERNEL
#define PLC "r"
#define PLC_l "l"
#define PLC_r "r"
#else
#define PLC "I"
#define PLC_l "I"
#define PLC_r "I"
#endif

/*
Expand All @@ -568,15 +570,15 @@ void notrace cpu_init(void)
"msr cpsr_c, %9"
:
: "r" (stk),
PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
PLC_r (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
"I" (offsetof(struct stack, irq[0])),
PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
PLC_r (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
"I" (offsetof(struct stack, abt[0])),
PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
PLC_r (PSR_F_BIT | PSR_I_BIT | UND_MODE),
"I" (offsetof(struct stack, und[0])),
PLC (PSR_F_BIT | PSR_I_BIT | FIQ_MODE),
PLC_r (PSR_F_BIT | PSR_I_BIT | FIQ_MODE),
"I" (offsetof(struct stack, fiq[0])),
PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
PLC_l (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
: "r14");
#endif
}
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17 changes: 12 additions & 5 deletions arch/arm64/mm/init.c
Expand Up @@ -174,14 +174,21 @@ static void __init reserve_elfcorehdr(void)
#endif /* CONFIG_CRASH_DUMP */

/*
* Return the maximum physical address for a zone with a given address size
* limit. It currently assumes that for memory starting above 4G, 32-bit
* devices will use a DMA offset.
* Return the maximum physical address for a zone accessible by the given bits
* limit. If DRAM starts above 32-bit, expand the zone to the maximum
* available memory, otherwise cap it at 32-bit.
*/
static phys_addr_t __init max_zone_phys(unsigned int zone_bits)
{
phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, zone_bits);
return min(offset + (1ULL << zone_bits), memblock_end_of_DRAM());
phys_addr_t zone_mask = DMA_BIT_MASK(zone_bits);
phys_addr_t phys_start = memblock_start_of_DRAM();

if (phys_start > U32_MAX)
zone_mask = PHYS_ADDR_MAX;
else if (phys_start > zone_mask)
zone_mask = U32_MAX;

return min(zone_mask, memblock_end_of_DRAM() - 1) + 1;
}

static void __init zone_sizes_init(unsigned long min, unsigned long max)
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37 changes: 16 additions & 21 deletions arch/arm64/mm/mmu.c
Expand Up @@ -469,6 +469,21 @@ void __init mark_linear_text_alias_ro(void)
PAGE_KERNEL_RO);
}

static bool crash_mem_map __initdata;

static int __init enable_crash_mem_map(char *arg)
{
/*
* Proper parameter parsing is done by reserve_crashkernel(). We only
* need to know if the linear map has to avoid block mappings so that
* the crashkernel reservations can be unmapped later.
*/
crash_mem_map = true;

return 0;
}
early_param("crashkernel", enable_crash_mem_map);

static void __init map_mem(pgd_t *pgdp)
{
phys_addr_t kernel_start = __pa_symbol(_text);
Expand All @@ -477,7 +492,7 @@ static void __init map_mem(pgd_t *pgdp)
int flags = 0;
u64 i;

if (rodata_full || debug_pagealloc_enabled())
if (rodata_full || crash_mem_map || debug_pagealloc_enabled())
flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;

/*
Expand All @@ -487,11 +502,6 @@ static void __init map_mem(pgd_t *pgdp)
* the following for-loop
*/
memblock_mark_nomap(kernel_start, kernel_end - kernel_start);
#ifdef CONFIG_KEXEC_CORE
if (crashk_res.end)
memblock_mark_nomap(crashk_res.start,
resource_size(&crashk_res));
#endif

/* map all the memory banks */
for_each_mem_range(i, &start, &end) {
Expand Down Expand Up @@ -519,21 +529,6 @@ static void __init map_mem(pgd_t *pgdp)
__map_memblock(pgdp, kernel_start, kernel_end,
PAGE_KERNEL, NO_CONT_MAPPINGS);
memblock_clear_nomap(kernel_start, kernel_end - kernel_start);

#ifdef CONFIG_KEXEC_CORE
/*
* Use page-level mappings here so that we can shrink the region
* in page granularity and put back unused memory to buddy system
* through /sys/kernel/kexec_crash_size interface.
*/
if (crashk_res.end) {
__map_memblock(pgdp, crashk_res.start, crashk_res.end + 1,
PAGE_KERNEL,
NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS);
memblock_clear_nomap(crashk_res.start,
resource_size(&crashk_res));
}
#endif
}

void mark_rodata_ro(void)
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10 changes: 5 additions & 5 deletions arch/mips/generic/board-boston.its.S
@@ -1,22 +1,22 @@
/ {
images {
fdt@boston {
fdt-boston {
description = "img,boston Device Tree";
data = /incbin/("boot/dts/img/boston.dtb");
type = "flat_dt";
arch = "mips";
compression = "none";
hash@0 {
hash {
algo = "sha1";
};
};
};

configurations {
conf@boston {
conf-boston {
description = "Boston Linux kernel";
kernel = "kernel@0";
fdt = "fdt@boston";
kernel = "kernel";
fdt = "fdt-boston";
};
};
};
10 changes: 5 additions & 5 deletions arch/mips/generic/board-ni169445.its.S
@@ -1,22 +1,22 @@
/ {
images {
fdt@ni169445 {
fdt-ni169445 {
description = "NI 169445 device tree";
data = /incbin/("boot/dts/ni/169445.dtb");
type = "flat_dt";
arch = "mips";
compression = "none";
hash@0 {
hash {
algo = "sha1";
};
};
};

configurations {
conf@ni169445 {
conf-ni169445 {
description = "NI 169445 Linux Kernel";
kernel = "kernel@0";
fdt = "fdt@ni169445";
kernel = "kernel";
fdt = "fdt-ni169445";
};
};
};
20 changes: 10 additions & 10 deletions arch/mips/generic/board-ocelot.its.S
@@ -1,40 +1,40 @@
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/ {
images {
fdt@ocelot_pcb123 {
fdt-ocelot_pcb123 {
description = "MSCC Ocelot PCB123 Device Tree";
data = /incbin/("boot/dts/mscc/ocelot_pcb123.dtb");
type = "flat_dt";
arch = "mips";
compression = "none";
hash@0 {
hash {
algo = "sha1";
};
};

fdt@ocelot_pcb120 {
fdt-ocelot_pcb120 {
description = "MSCC Ocelot PCB120 Device Tree";
data = /incbin/("boot/dts/mscc/ocelot_pcb120.dtb");
type = "flat_dt";
arch = "mips";
compression = "none";
hash@0 {
hash {
algo = "sha1";
};
};
};

configurations {
conf@ocelot_pcb123 {
conf-ocelot_pcb123 {
description = "Ocelot Linux kernel";
kernel = "kernel@0";
fdt = "fdt@ocelot_pcb123";
kernel = "kernel";
fdt = "fdt-ocelot_pcb123";
};

conf@ocelot_pcb120 {
conf-ocelot_pcb120 {
description = "Ocelot Linux kernel";
kernel = "kernel@0";
fdt = "fdt@ocelot_pcb120";
kernel = "kernel";
fdt = "fdt-ocelot_pcb120";
};
};
};
10 changes: 5 additions & 5 deletions arch/mips/generic/board-xilfpga.its.S
@@ -1,22 +1,22 @@
/ {
images {
fdt@xilfpga {
fdt-xilfpga {
description = "MIPSfpga (xilfpga) Device Tree";
data = /incbin/("boot/dts/xilfpga/nexys4ddr.dtb");
type = "flat_dt";
arch = "mips";
compression = "none";
hash@0 {
hash {
algo = "sha1";
};
};
};

configurations {
conf@xilfpga {
conf-xilfpga {
description = "MIPSfpga Linux kernel";
kernel = "kernel@0";
fdt = "fdt@xilfpga";
kernel = "kernel";
fdt = "fdt-xilfpga";
};
};
};
10 changes: 5 additions & 5 deletions arch/mips/generic/vmlinux.its.S
Expand Up @@ -6,7 +6,7 @@
#address-cells = <ADDR_CELLS>;

images {
kernel@0 {
kernel {
description = KERNEL_NAME;
data = /incbin/(VMLINUX_BINARY);
type = "kernel";
Expand All @@ -15,18 +15,18 @@
compression = VMLINUX_COMPRESSION;
load = /bits/ ADDR_BITS <VMLINUX_LOAD_ADDRESS>;
entry = /bits/ ADDR_BITS <VMLINUX_ENTRY_ADDRESS>;
hash@0 {
hash {
algo = "sha1";
};
};
};

configurations {
default = "conf@default";
default = "conf-default";

conf@default {
conf-default {
description = "Generic Linux kernel";
kernel = "kernel@0";
kernel = "kernel";
};
};
};
2 changes: 1 addition & 1 deletion arch/riscv/Makefile
Expand Up @@ -14,7 +14,7 @@ ifeq ($(CONFIG_DYNAMIC_FTRACE),y)
LDFLAGS_vmlinux := --no-relax
endif

ifeq ($(CONFIG_64BIT)$(CONFIG_CMODEL_MEDLOW),yy)
ifeq ($(CONFIG_CMODEL_MEDLOW),y)
KBUILD_CFLAGS_MODULE += -mcmodel=medany
endif

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18 changes: 11 additions & 7 deletions arch/s390/include/asm/stacktrace.h
Expand Up @@ -90,12 +90,16 @@ struct stack_frame {
CALL_ARGS_4(arg1, arg2, arg3, arg4); \
register unsigned long r4 asm("6") = (unsigned long)(arg5)

#define CALL_FMT_0 "=&d" (r2) :
#define CALL_FMT_1 "+&d" (r2) :
#define CALL_FMT_2 CALL_FMT_1 "d" (r3),
#define CALL_FMT_3 CALL_FMT_2 "d" (r4),
#define CALL_FMT_4 CALL_FMT_3 "d" (r5),
#define CALL_FMT_5 CALL_FMT_4 "d" (r6),
/*
* To keep this simple mark register 2-6 as being changed (volatile)
* by the called function, even though register 6 is saved/nonvolatile.
*/
#define CALL_FMT_0 "=&d" (r2)
#define CALL_FMT_1 "+&d" (r2)
#define CALL_FMT_2 CALL_FMT_1, "+&d" (r3)
#define CALL_FMT_3 CALL_FMT_2, "+&d" (r4)
#define CALL_FMT_4 CALL_FMT_3, "+&d" (r5)
#define CALL_FMT_5 CALL_FMT_4, "+&d" (r6)

#define CALL_CLOBBER_5 "0", "1", "14", "cc", "memory"
#define CALL_CLOBBER_4 CALL_CLOBBER_5
Expand All @@ -117,7 +121,7 @@ struct stack_frame {
" brasl 14,%[_fn]\n" \
" la 15,0(%[_prev])\n" \
: [_prev] "=&a" (prev), CALL_FMT_##nr \
[_stack] "R" (stack), \
: [_stack] "R" (stack), \
[_bc] "i" (offsetof(struct stack_frame, back_chain)), \
[_frame] "d" (frame), \
[_fn] "X" (fn) : CALL_CLOBBER_##nr); \
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2 changes: 1 addition & 1 deletion arch/x86/entry/common.c
Expand Up @@ -127,8 +127,8 @@ static noinstr bool __do_fast_syscall_32(struct pt_regs *regs)
/* User code screwed up. */
regs->ax = -EFAULT;

instrumentation_end();
local_irq_disable();
instrumentation_end();
irqentry_exit_to_user_mode(regs);
return false;
}
Expand Down

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