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dt-bindings: msm: dsi: add yaml schemas for DSI bindings
Add YAML schema for the device tree bindings for DSI Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1621856653-10649-2-git-send-email-mkrishn@codeaurora.org Signed-off-by: Rob Clark <robdclark@chromium.org>
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Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
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# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Qualcomm Display DSI controller | ||
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maintainers: | ||
- Krishna Manikandan <mkrishn@codeaurora.org> | ||
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allOf: | ||
- $ref: "../dsi-controller.yaml#" | ||
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properties: | ||
compatible: | ||
items: | ||
- const: qcom,mdss-dsi-ctrl | ||
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reg: | ||
maxItems: 1 | ||
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reg-names: | ||
const: dsi_ctrl | ||
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interrupts: | ||
maxItems: 1 | ||
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clocks: | ||
items: | ||
- description: Display byte clock | ||
- description: Display byte interface clock | ||
- description: Display pixel clock | ||
- description: Display escape clock | ||
- description: Display AHB clock | ||
- description: Display AXI clock | ||
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clock-names: | ||
items: | ||
- const: byte | ||
- const: byte_intf | ||
- const: pixel | ||
- const: core | ||
- const: iface | ||
- const: bus | ||
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phys: | ||
maxItems: 1 | ||
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phy-names: | ||
const: dsi | ||
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"#address-cells": true | ||
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"#size-cells": true | ||
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syscon-sfpb: | ||
description: A phandle to mmss_sfpb syscon node (only for DSIv2). | ||
$ref: "/schemas/types.yaml#/definitions/phandle" | ||
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qcom,dual-dsi-mode: | ||
type: boolean | ||
description: | | ||
Indicates if the DSI controller is driving a panel which needs | ||
2 DSI links. | ||
power-domains: | ||
maxItems: 1 | ||
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operating-points-v2: true | ||
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ports: | ||
$ref: "/schemas/graph.yaml#/properties/ports" | ||
description: | | ||
Contains DSI controller input and output ports as children, each | ||
containing one endpoint subnode. | ||
properties: | ||
port@0: | ||
$ref: "/schemas/graph.yaml#/properties/port" | ||
description: | | ||
Input endpoints of the controller. | ||
properties: | ||
endpoint: | ||
$ref: /schemas/media/video-interfaces.yaml# | ||
unevaluatedProperties: false | ||
properties: | ||
data-lanes: | ||
maxItems: 4 | ||
minItems: 4 | ||
items: | ||
enum: [ 0, 1, 2, 3 ] | ||
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port@1: | ||
$ref: "/schemas/graph.yaml#/properties/port" | ||
description: | | ||
Output endpoints of the controller. | ||
properties: | ||
endpoint: | ||
$ref: /schemas/media/video-interfaces.yaml# | ||
unevaluatedProperties: false | ||
properties: | ||
data-lanes: | ||
maxItems: 4 | ||
minItems: 4 | ||
items: | ||
enum: [ 0, 1, 2, 3 ] | ||
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required: | ||
- port@0 | ||
- port@1 | ||
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required: | ||
- compatible | ||
- reg | ||
- reg-names | ||
- interrupts | ||
- clocks | ||
- clock-names | ||
- phys | ||
- phy-names | ||
- power-domains | ||
- operating-points-v2 | ||
- ports | ||
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additionalProperties: false | ||
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examples: | ||
- | | ||
#include <dt-bindings/interrupt-controller/arm-gic.h> | ||
#include <dt-bindings/clock/qcom,dispcc-sdm845.h> | ||
#include <dt-bindings/clock/qcom,gcc-sdm845.h> | ||
#include <dt-bindings/power/qcom-rpmpd.h> | ||
dsi@ae94000 { | ||
compatible = "qcom,mdss-dsi-ctrl"; | ||
reg = <0x0ae94000 0x400>; | ||
reg-names = "dsi_ctrl"; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
interrupt-parent = <&mdss>; | ||
interrupts = <4>; | ||
clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, | ||
<&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, | ||
<&dispcc DISP_CC_MDSS_PCLK0_CLK>, | ||
<&dispcc DISP_CC_MDSS_ESC0_CLK>, | ||
<&dispcc DISP_CC_MDSS_AHB_CLK>, | ||
<&dispcc DISP_CC_MDSS_AXI_CLK>; | ||
clock-names = "byte", | ||
"byte_intf", | ||
"pixel", | ||
"core", | ||
"iface", | ||
"bus"; | ||
phys = <&dsi0_phy>; | ||
phy-names = "dsi"; | ||
power-domains = <&rpmhpd SC7180_CX>; | ||
operating-points-v2 = <&dsi_opp_table>; | ||
ports { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
port@0 { | ||
reg = <0>; | ||
dsi0_in: endpoint { | ||
remote-endpoint = <&dpu_intf1_out>; | ||
}; | ||
}; | ||
port@1 { | ||
reg = <1>; | ||
dsi0_out: endpoint { | ||
remote-endpoint = <&sn65dsi86_in>; | ||
data-lanes = <0 1 2 3>; | ||
}; | ||
}; | ||
}; | ||
}; | ||
... |
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