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ARM: dts: at91: sama5d27_wlsom1: add SAMA5D27 wlsom1 and wlsom1-ek
This is the addition of a new Evaluation Kit the SAMA5D27-WLSOM1-EK. It's based on the Microchip WireLess SoM which contains the SAMA5D27 LPDDR2 2Gbits SiP. [nicolas.ferre@microchip.com]: initial implementation Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> [eugen.hristev@microchip.com]: ported to new kernel version, [eugen.hristev@microchip.com]: addition of peripherals (adc, pmic, qspi, uart) Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Link: https://lore.kernel.org/r/1573543139-8533-4-git-send-email-eugen.hristev@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
/* | ||
* at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1 | ||
* | ||
* Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries | ||
* | ||
* Author: Nicolas Ferre <nicolas.ferre@microcihp.com> | ||
* Author: Eugen Hristev <eugen.hristev@microcihp.com> | ||
*/ | ||
#include "sama5d2.dtsi" | ||
#include "sama5d2-pinfunc.h" | ||
#include <dt-bindings/gpio/gpio.h> | ||
#include <dt-bindings/mfd/atmel-flexcom.h> | ||
#include <dt-bindings/pinctrl/at91.h> | ||
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/ { | ||
model = "Microchip SAMA5D27 WLSOM1"; | ||
compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5"; | ||
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clocks { | ||
slow_xtal { | ||
clock-frequency = <32768>; | ||
}; | ||
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main_xtal { | ||
clock-frequency = <24000000>; | ||
}; | ||
}; | ||
}; | ||
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&flx1 { | ||
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; | ||
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uart6: serial@200 { | ||
compatible = "atmel,at91sam9260-usart"; | ||
reg = <0x200 0x200>; | ||
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>; | ||
dmas = <&dma0 | ||
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | | ||
AT91_XDMAC_DT_PERID(13))>, | ||
<&dma0 | ||
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | | ||
AT91_XDMAC_DT_PERID(14))>; | ||
dma-names = "tx", "rx"; | ||
clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; | ||
clock-names = "usart"; | ||
pinctrl-0 = <&pinctrl_flx1_default>; | ||
pinctrl-names = "default"; | ||
}; | ||
}; | ||
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&i2c0 { | ||
pinctrl-0 = <&pinctrl_i2c0_default>; | ||
pinctrl-names = "default"; | ||
status = "okay"; | ||
}; | ||
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&i2c1 { | ||
dmas = <0>, <0>; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pinctrl_i2c1_default>; | ||
status = "okay"; | ||
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mcp16502@5b { | ||
compatible = "microchip,mcp16502"; | ||
reg = <0x5b>; | ||
status = "okay"; | ||
lpm-gpios = <&pioBU 0 GPIO_ACTIVE_LOW>; | ||
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regulators { | ||
vdd_3v3: VDD_IO { | ||
regulator-name = "VDD_IO"; | ||
regulator-min-microvolt = <1200000>; | ||
regulator-max-microvolt = <3700000>; | ||
regulator-initial-mode = <2>; | ||
regulator-allowed-modes = <2>, <4>; | ||
regulator-always-on; | ||
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regulator-state-standby { | ||
regulator-on-in-suspend; | ||
regulator-mode = <4>; | ||
}; | ||
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regulator-state-mem { | ||
regulator-off-in-suspend; | ||
regulator-mode = <4>; | ||
}; | ||
}; | ||
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vddio_ddr: VDD_DDR { | ||
regulator-name = "VDD_DDR"; | ||
regulator-min-microvolt = <600000>; | ||
regulator-max-microvolt = <1850000>; | ||
regulator-initial-mode = <2>; | ||
regulator-allowed-modes = <2>, <4>; | ||
regulator-always-on; | ||
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regulator-state-standby { | ||
regulator-on-in-suspend; | ||
regulator-suspend-microvolt = <1200000>; | ||
regulator-changeable-in-suspend; | ||
regulator-mode = <4>; | ||
}; | ||
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regulator-state-mem { | ||
regulator-on-in-suspend; | ||
regulator-suspend-microvolt = <1200000>; | ||
regulator-changeable-in-suspend; | ||
regulator-mode = <4>; | ||
}; | ||
}; | ||
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vdd_core: VDD_CORE { | ||
regulator-name = "VDD_CORE"; | ||
regulator-min-microvolt = <600000>; | ||
regulator-max-microvolt = <1850000>; | ||
regulator-initial-mode = <2>; | ||
regulator-allowed-modes = <2>, <4>; | ||
regulator-always-on; | ||
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regulator-state-standby { | ||
regulator-on-in-suspend; | ||
regulator-mode = <4>; | ||
}; | ||
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regulator-state-mem { | ||
regulator-off-in-suspend; | ||
regulator-mode = <4>; | ||
}; | ||
}; | ||
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vdd_ddr: VDD_OTHER { | ||
regulator-name = "VDD_OTHER"; | ||
regulator-min-microvolt = <1800000>; | ||
regulator-max-microvolt = <1800000>; | ||
regulator-initial-mode = <2>; | ||
regulator-allowed-modes = <2>, <4>; | ||
regulator-always-on; | ||
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regulator-state-standby { | ||
regulator-on-in-suspend; | ||
regulator-suspend-microvolt = <1800000>; | ||
regulator-changeable-in-suspend; | ||
regulator-mode = <4>; | ||
}; | ||
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regulator-state-mem { | ||
regulator-on-in-suspend; | ||
regulator-suspend-microvolt = <1800000>; | ||
regulator-changeable-in-suspend; | ||
regulator-mode = <4>; | ||
}; | ||
}; | ||
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LDO1 { | ||
regulator-name = "LDO1"; | ||
regulator-min-microvolt = <1200000>; | ||
regulator-max-microvolt = <3700000>; | ||
regulator-always-on; | ||
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regulator-state-standby { | ||
regulator-on-in-suspend; | ||
}; | ||
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regulator-state-mem { | ||
regulator-off-in-suspend; | ||
}; | ||
}; | ||
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LDO2 { | ||
regulator-name = "LDO2"; | ||
regulator-min-microvolt = <1200000>; | ||
regulator-max-microvolt = <3700000>; | ||
regulator-always-on; | ||
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regulator-state-standby { | ||
regulator-on-in-suspend; | ||
}; | ||
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regulator-state-mem { | ||
regulator-off-in-suspend; | ||
}; | ||
}; | ||
}; | ||
}; | ||
}; | ||
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&macb0 { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pinctrl_macb0_default>; | ||
phy-mode = "rmii"; | ||
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ethernet-phy@0 { | ||
reg = <0x0>; | ||
interrupt-parent = <&pioA>; | ||
interrupts = <PIN_PB24 IRQ_TYPE_LEVEL_LOW>; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pinctrl_macb0_phy_irq>; | ||
}; | ||
}; | ||
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&pmc { | ||
atmel,osc-bypass; | ||
}; | ||
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&qspi1 { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pinctrl_qspi1_default>; | ||
status = "disabled"; | ||
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qspi1_flash: spi_flash@0 { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
compatible = "jedec,spi-nor"; | ||
reg = <0>; | ||
spi-max-frequency = <80000000>; | ||
spi-rx-bus-width = <4>; | ||
spi-tx-bus-width = <4>; | ||
m25p,fast-read; | ||
status = "disabled"; | ||
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at91bootstrap@0 { | ||
label = "at91bootstrap"; | ||
reg = <0x0 0x40000>; | ||
}; | ||
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bootloader@40000 { | ||
label = "bootloader"; | ||
reg = <0x40000 0xc0000>; | ||
}; | ||
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bootloaderenvred@100000 { | ||
label = "bootloader env redundant"; | ||
reg = <0x100000 0x40000>; | ||
}; | ||
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bootloaderenv@140000 { | ||
label = "bootloader env"; | ||
reg = <0x140000 0x40000>; | ||
}; | ||
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dtb@180000 { | ||
label = "device tree"; | ||
reg = <0x180000 0x80000>; | ||
}; | ||
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kernel@200000 { | ||
label = "kernel"; | ||
reg = <0x200000 0x600000>; | ||
}; | ||
}; | ||
}; | ||
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&pioA { | ||
pinctrl_flx1_default: flx1_usart_default { | ||
pinmux = <PIN_PA24__FLEXCOM1_IO0>, | ||
<PIN_PA23__FLEXCOM1_IO1>, | ||
<PIN_PA25__FLEXCOM1_IO3>, | ||
<PIN_PA26__FLEXCOM1_IO4>; | ||
bias-disable; | ||
}; | ||
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pinctrl_i2c0_default: i2c0_default { | ||
pinmux = <PIN_PD21__TWD0>, | ||
<PIN_PD22__TWCK0>; | ||
bias-disable; | ||
}; | ||
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pinctrl_i2c1_default: i2c1_default { | ||
pinmux = <PIN_PD19__TWD1>, | ||
<PIN_PD20__TWCK1>; | ||
bias-disable; | ||
}; | ||
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pinctrl_macb0_default: macb0_default { | ||
pinmux = <PIN_PB14__GTXCK>, | ||
<PIN_PB15__GTXEN>, | ||
<PIN_PB16__GRXDV>, | ||
<PIN_PB17__GRXER>, | ||
<PIN_PB18__GRX0>, | ||
<PIN_PB19__GRX1>, | ||
<PIN_PB20__GTX0>, | ||
<PIN_PB21__GTX1>, | ||
<PIN_PB22__GMDC>, | ||
<PIN_PB23__GMDIO>; | ||
bias-disable; | ||
}; | ||
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pinctrl_macb0_phy_irq: macb0_phy_irq { | ||
pinmux = <PIN_PB24__GPIO>; | ||
bias-disable; | ||
}; | ||
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pinctrl_qspi1_default: qspi1_default { | ||
pinmux = <PIN_PB5__QSPI1_SCK>, | ||
<PIN_PB6__QSPI1_CS>, | ||
<PIN_PB7__QSPI1_IO0>, | ||
<PIN_PB8__QSPI1_IO1>, | ||
<PIN_PB9__QSPI1_IO2>, | ||
<PIN_PB10__QSPI1_IO3>; | ||
bias-pull-up; | ||
}; | ||
}; | ||
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