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RISC-V: KVM: Remove 's' & 'u' as valid ISA extension
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[ Upstream commit 3ab75a7 ]

There are no ISA extension defined as 's' & 'u' in RISC-V specifications.
The misa register defines 's' & 'u' bit as Supervisor/User privilege mode
enabled. But it should not appear in the ISA extension in the device tree.

Remove those from the allowed ISA extension for kvm.

Fixes: a33c72f ("RISC-V: KVM: Implement VCPU create, init and
destroy functions")
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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atishp04 authored and gregkh committed Apr 27, 2022
1 parent 1820113 commit 69a8ee1
Showing 1 changed file with 1 addition and 3 deletions.
4 changes: 1 addition & 3 deletions arch/riscv/kvm/vcpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -43,9 +43,7 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
riscv_isa_extension_mask(d) | \
riscv_isa_extension_mask(f) | \
riscv_isa_extension_mask(i) | \
riscv_isa_extension_mask(m) | \
riscv_isa_extension_mask(s) | \
riscv_isa_extension_mask(u))
riscv_isa_extension_mask(m))

static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
{
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