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Merge tag 'v6.1.9' into 6.1
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This is the 6.1.9 stable release
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xanmod committed Feb 1, 2023
2 parents f76043e + 68a9545 commit 7481077
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Showing 338 changed files with 2,822 additions and 1,518 deletions.
4 changes: 2 additions & 2 deletions Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
Expand Up @@ -16,7 +16,7 @@ properties:
compatible:
items:
- enum:
- renesas,i2c-r9a09g011 # RZ/V2M
- renesas,r9a09g011-i2c # RZ/V2M
- const: renesas,rzv2m-i2c

reg:
Expand Down Expand Up @@ -66,7 +66,7 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
i2c0: i2c@a4030000 {
compatible = "renesas,i2c-r9a09g011", "renesas,rzv2m-i2c";
compatible = "renesas,r9a09g011-i2c", "renesas,rzv2m-i2c";
reg = <0xa4030000 0x80>;
interrupts = <GIC_SPI 232 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 236 IRQ_TYPE_EDGE_RISING>;
Expand Down
21 changes: 19 additions & 2 deletions Documentation/devicetree/bindings/regulator/samsung,s2mps14.yaml
Expand Up @@ -19,8 +19,8 @@ description: |
additional information and example.
patternProperties:
# 25 LDOs
"^LDO([1-9]|[1][0-9]|2[0-5])$":
# 25 LDOs, without LDO10-12
"^LDO([1-9]|1[3-9]|2[0-5])$":
type: object
$ref: regulator.yaml#
unevaluatedProperties: false
Expand All @@ -30,6 +30,23 @@ patternProperties:
required:
- regulator-name

"^LDO(1[0-2])$":
type: object
$ref: regulator.yaml#
unevaluatedProperties: false
description:
Properties for single LDO regulator.

properties:
samsung,ext-control-gpios:
maxItems: 1
description:
LDO10, LDO11 and LDO12 can be configured to external control over
GPIO.

required:
- regulator-name

# 5 bucks
"^BUCK[1-5]$":
type: object
Expand Down
2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/riscv/cpus.yaml
Expand Up @@ -80,7 +80,7 @@ properties:
insensitive, letters in the riscv,isa string must be all
lowercase to simplify parsing.
$ref: "/schemas/types.yaml#/definitions/string"
pattern: ^rv(?:64|32)imaf?d?q?c?b?v?k?h?(?:_[hsxz](?:[a-z])+)*$
pattern: ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[a-z])+)?(?:_[hsxz](?:[a-z])+)*$

# RISC-V requires 'timebase-frequency' in /cpus, so disallow it here
timebase-frequency: false
Expand Down
Empty file modified Documentation/devicetree/bindings/sound/everest,es8326.yaml 100755 → 100644
Empty file.
36 changes: 36 additions & 0 deletions Documentation/x86/amd-memory-encryption.rst
Expand Up @@ -95,3 +95,39 @@ by supplying mem_encrypt=on on the kernel command line. However, if BIOS does
not enable SME, then Linux will not be able to activate memory encryption, even
if configured to do so by default or the mem_encrypt=on command line parameter
is specified.

Secure Nested Paging (SNP)
==========================

SEV-SNP introduces new features (SEV_FEATURES[1:63]) which can be enabled
by the hypervisor for security enhancements. Some of these features need
guest side implementation to function correctly. The below table lists the
expected guest behavior with various possible scenarios of guest/hypervisor
SNP feature support.

+-----------------+---------------+---------------+------------------+
| Feature Enabled | Guest needs | Guest has | Guest boot |
| by the HV | implementation| implementation| behaviour |
+=================+===============+===============+==================+
| No | No | No | Boot |
| | | | |
+-----------------+---------------+---------------+------------------+
| No | Yes | No | Boot |
| | | | |
+-----------------+---------------+---------------+------------------+
| No | Yes | Yes | Boot |
| | | | |
+-----------------+---------------+---------------+------------------+
| Yes | No | No | Boot with |
| | | | feature enabled |
+-----------------+---------------+---------------+------------------+
| Yes | Yes | No | Graceful boot |
| | | | failure |
+-----------------+---------------+---------------+------------------+
| Yes | Yes | Yes | Boot with |
| | | | feature enabled |
+-----------------+---------------+---------------+------------------+

More details in AMD64 APM[1] Vol 2: 15.34.10 SEV_STATUS MSR

[1] https://www.amd.com/system/files/TechDocs/40332.pdf
17 changes: 15 additions & 2 deletions Makefile
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 1
SUBLEVEL = 8
SUBLEVEL = 9
EXTRAVERSION =
NAME = Hurr durr I'ma ninja sloth

Expand Down Expand Up @@ -538,7 +538,7 @@ LDFLAGS_MODULE =
CFLAGS_KERNEL =
RUSTFLAGS_KERNEL =
AFLAGS_KERNEL =
export LDFLAGS_vmlinux =
LDFLAGS_vmlinux =

# Use USERINCLUDE when you must reference the UAPI directories only.
USERINCLUDE := \
Expand Down Expand Up @@ -1375,6 +1375,18 @@ vmlinux.o modules.builtin.modinfo modules.builtin: vmlinux_o
@:

PHONY += vmlinux
# LDFLAGS_vmlinux in the top Makefile defines linker flags for the top vmlinux,
# not for decompressors. LDFLAGS_vmlinux in arch/*/boot/compressed/Makefile is
# unrelated; the decompressors just happen to have the same base name,
# arch/*/boot/compressed/vmlinux.
# Export LDFLAGS_vmlinux only to scripts/Makefile.vmlinux.
#
# _LDFLAGS_vmlinux is a workaround for the 'private export' bug:
# https://savannah.gnu.org/bugs/?61463
# For Make > 4.4, the following simple code will work:
# vmlinux: private export LDFLAGS_vmlinux := $(LDFLAGS_vmlinux)
vmlinux: private _LDFLAGS_vmlinux := $(LDFLAGS_vmlinux)
vmlinux: export LDFLAGS_vmlinux = $(_LDFLAGS_vmlinux)
vmlinux: vmlinux.o $(KBUILD_LDS) modpost
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.vmlinux

Expand Down Expand Up @@ -1660,6 +1672,7 @@ endif
# *.ko are usually independent of vmlinux, but CONFIG_DEBUG_INFOBTF_MODULES
# is an exception.
ifdef CONFIG_DEBUG_INFO_BTF_MODULES
KBUILD_BUILTIN := 1
modules: vmlinux
endif

Expand Down
1 change: 0 additions & 1 deletion arch/arm/boot/dts/imx6qdl-gw560x.dtsi
Expand Up @@ -632,7 +632,6 @@
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
uart-has-rtscts;
rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
Expand Down
2 changes: 1 addition & 1 deletion arch/arm/boot/dts/imx6ul-pico-dwarf.dts
Expand Up @@ -32,7 +32,7 @@
};

&i2c2 {
clock_frequency = <100000>;
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
Expand Down
4 changes: 2 additions & 2 deletions arch/arm/boot/dts/imx7d-pico-dwarf.dts
Expand Up @@ -32,7 +32,7 @@
};

&i2c1 {
clock_frequency = <100000>;
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
Expand All @@ -52,7 +52,7 @@
};

&i2c4 {
clock_frequency = <100000>;
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
Expand Down
4 changes: 2 additions & 2 deletions arch/arm/boot/dts/imx7d-pico-nymph.dts
Expand Up @@ -43,7 +43,7 @@
};

&i2c1 {
clock_frequency = <100000>;
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
Expand All @@ -64,7 +64,7 @@
};

&i2c2 {
clock_frequency = <100000>;
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
Expand Down
2 changes: 1 addition & 1 deletion arch/arm/boot/dts/sam9x60.dtsi
Expand Up @@ -564,7 +564,7 @@
mpddrc: mpddrc@ffffe800 {
compatible = "microchip,sam9x60-ddramc", "atmel,sama5d3-ddramc";
reg = <0xffffe800 0x200>;
clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_CORE PMC_MCK>;
clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>;
clock-names = "ddrck", "mpddr";
};

Expand Down
8 changes: 6 additions & 2 deletions arch/arm/boot/dts/stm32mp151a-prtt1l.dtsi
Expand Up @@ -101,8 +101,12 @@

&qspi {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
pinctrl-0 = <&qspi_clk_pins_a
&qspi_bk1_pins_a
&qspi_cs1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a
&qspi_bk1_sleep_pins_a
&qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>;
#size-cells = <0>;
Expand Down
8 changes: 6 additions & 2 deletions arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi
Expand Up @@ -391,8 +391,12 @@

&qspi {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
pinctrl-0 = <&qspi_clk_pins_a
&qspi_bk1_pins_a
&qspi_cs1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a
&qspi_bk1_sleep_pins_a
&qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>;
#size-cells = <0>;
Expand Down
8 changes: 6 additions & 2 deletions arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
Expand Up @@ -428,8 +428,12 @@

&qspi {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
pinctrl-0 = <&qspi_clk_pins_a
&qspi_bk1_pins_a
&qspi_cs1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a
&qspi_bk1_sleep_pins_a
&qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>;
#size-cells = <0>;
Expand Down
8 changes: 6 additions & 2 deletions arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
Expand Up @@ -247,8 +247,12 @@

&qspi {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
pinctrl-0 = <&qspi_clk_pins_a
&qspi_bk1_pins_a
&qspi_cs1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a
&qspi_bk1_sleep_pins_a
&qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
#address-cells = <1>;
#size-cells = <0>;
Expand Down
1 change: 1 addition & 0 deletions arch/arm/mach-imx/cpu-imx25.c
Expand Up @@ -23,6 +23,7 @@ static int mx25_read_cpu_rev(void)

np = of_find_compatible_node(NULL, NULL, "fsl,imx25-iim");
iim_base = of_iomap(np, 0);
of_node_put(np);
BUG_ON(!iim_base);
rev = readl(iim_base + MXC_IIMSREV);
iounmap(iim_base);
Expand Down
1 change: 1 addition & 0 deletions arch/arm/mach-imx/cpu-imx27.c
Expand Up @@ -28,6 +28,7 @@ static int mx27_read_cpu_rev(void)

np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm");
ccm_base = of_iomap(np, 0);
of_node_put(np);
BUG_ON(!ccm_base);
/*
* now we have access to the IO registers. As we need
Expand Down
1 change: 1 addition & 0 deletions arch/arm/mach-imx/cpu-imx31.c
Expand Up @@ -39,6 +39,7 @@ static int mx31_read_cpu_rev(void)

np = of_find_compatible_node(NULL, NULL, "fsl,imx31-iim");
iim_base = of_iomap(np, 0);
of_node_put(np);
BUG_ON(!iim_base);

/* read SREV register from IIM module */
Expand Down
1 change: 1 addition & 0 deletions arch/arm/mach-imx/cpu-imx35.c
Expand Up @@ -21,6 +21,7 @@ static int mx35_read_cpu_rev(void)

np = of_find_compatible_node(NULL, NULL, "fsl,imx35-iim");
iim_base = of_iomap(np, 0);
of_node_put(np);
BUG_ON(!iim_base);

rev = imx_readl(iim_base + MXC_IIMSREV);
Expand Down
1 change: 1 addition & 0 deletions arch/arm/mach-imx/cpu-imx5.c
Expand Up @@ -28,6 +28,7 @@ static u32 imx5_read_srev_reg(const char *compat)

np = of_find_compatible_node(NULL, NULL, compat);
iim_base = of_iomap(np, 0);
of_node_put(np);
WARN_ON(!iim_base);

srev = readl(iim_base + IIM_SREV) & 0xff;
Expand Down
2 changes: 1 addition & 1 deletion arch/arm/mm/nommu.c
Expand Up @@ -161,7 +161,7 @@ void __init paging_init(const struct machine_desc *mdesc)
mpu_setup();

/* allocate the zero page. */
zero_page = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
zero_page = (void *)memblock_alloc(PAGE_SIZE, PAGE_SIZE);
if (!zero_page)
panic("%s: Failed to allocate %lu bytes align=0x%lx\n",
__func__, PAGE_SIZE, PAGE_SIZE);
Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi
Expand Up @@ -120,7 +120,7 @@
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_espi2>;
cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
status = "okay";

eeprom@0 {
Expand Down Expand Up @@ -316,7 +316,7 @@
MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41
MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x41
>;
};

Expand Down
1 change: 1 addition & 0 deletions arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
Expand Up @@ -759,6 +759,7 @@
&usbotg2 {
dr_mode = "host";
vbus-supply = <&reg_usb2_vbus>;
over-current-active-low;
status = "okay";
};

Expand Down
1 change: 1 addition & 0 deletions arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi
Expand Up @@ -9,6 +9,7 @@
simple-audio-card,bitclock-master = <&dailink_master>;
simple-audio-card,format = "i2s";
simple-audio-card,frame-master = <&dailink_master>;
simple-audio-card,mclk-fs = <256>;
simple-audio-card,name = "imx8mm-wm8904";
simple-audio-card,routing =
"Headphone Jack", "HPOUTL",
Expand Down
1 change: 1 addition & 0 deletions arch/arm64/boot/dts/freescale/imx8mm-verdin-dev.dtsi
Expand Up @@ -11,6 +11,7 @@
simple-audio-card,bitclock-master = <&dailink_master>;
simple-audio-card,format = "i2s";
simple-audio-card,frame-master = <&dailink_master>;
simple-audio-card,mclk-fs = <256>;
simple-audio-card,name = "imx8mm-nau8822";
simple-audio-card,routing =
"Headphones", "LHP",
Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/freescale/imx8mp-evk.dts
Expand Up @@ -36,8 +36,8 @@

pcie0_refclk: pcie0-refclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
#clock-cells = <0>;
clock-frequency = <100000000>;
};

reg_can1_stby: regulator-can1-stby {
Expand Down

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