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Merge tag 'v6.1.55' into 6.1
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This is the 6.1.55 stable release
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xanmod committed Sep 23, 2023
2 parents 0772870 + d23900f commit a819f1f
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Showing 179 changed files with 1,238 additions and 1,610 deletions.
2 changes: 2 additions & 0 deletions Documentation/admin-guide/cgroup-v1/memory.rst
Expand Up @@ -91,6 +91,8 @@ Brief summary of control files.
memory.oom_control set/show oom controls.
memory.numa_stat show the number of memory usage per numa
node
memory.kmem.limit_in_bytes This knob is deprecated and writing to
it will return -ENOTSUPP.
memory.kmem.usage_in_bytes show current kernel memory allocation
memory.kmem.failcnt show the number of kernel memory usage
hits limits
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3 changes: 3 additions & 0 deletions Documentation/arm64/silicon-errata.rst
Expand Up @@ -193,6 +193,9 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| Hisilicon | Hip08 SMMU PMCG | #162001800 | N/A |
+----------------+-----------------+-----------------+-----------------------------+
| Hisilicon | Hip08 SMMU PMCG | #162001900 | N/A |
| | Hip09 SMMU PMCG | | |
+----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+
| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
+----------------+-----------------+-----------------+-----------------------------+
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2 changes: 1 addition & 1 deletion Makefile
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 6
PATCHLEVEL = 1
SUBLEVEL = 54
SUBLEVEL = 55
EXTRAVERSION =
NAME = Curry Ramen

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8 changes: 4 additions & 4 deletions arch/arm/kernel/hw_breakpoint.c
Expand Up @@ -626,7 +626,7 @@ int hw_breakpoint_arch_parse(struct perf_event *bp,
hw->address &= ~alignment_mask;
hw->ctrl.len <<= offset;

if (is_default_overflow_handler(bp)) {
if (uses_default_overflow_handler(bp)) {
/*
* Mismatch breakpoints are required for single-stepping
* breakpoints.
Expand Down Expand Up @@ -798,7 +798,7 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,
* Otherwise, insert a temporary mismatch breakpoint so that
* we can single-step over the watchpoint trigger.
*/
if (!is_default_overflow_handler(wp))
if (!uses_default_overflow_handler(wp))
continue;
step:
enable_single_step(wp, instruction_pointer(regs));
Expand All @@ -811,7 +811,7 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,
info->trigger = addr;
pr_debug("watchpoint fired: address = 0x%x\n", info->trigger);
perf_bp_event(wp, regs);
if (is_default_overflow_handler(wp))
if (uses_default_overflow_handler(wp))
enable_single_step(wp, instruction_pointer(regs));
}

Expand Down Expand Up @@ -886,7 +886,7 @@ static void breakpoint_handler(unsigned long unknown, struct pt_regs *regs)
info->trigger = addr;
pr_debug("breakpoint fired: address = 0x%x\n", addr);
perf_bp_event(bp, regs);
if (is_default_overflow_handler(bp))
if (uses_default_overflow_handler(bp))
enable_single_step(bp, addr);
goto unlock;
}
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14 changes: 13 additions & 1 deletion arch/arm/kernel/machine_kexec.c
Expand Up @@ -92,16 +92,28 @@ void machine_crash_nonpanic_core(void *unused)
}
}

static DEFINE_PER_CPU(call_single_data_t, cpu_stop_csd) =
CSD_INIT(machine_crash_nonpanic_core, NULL);

void crash_smp_send_stop(void)
{
static int cpus_stopped;
unsigned long msecs;
call_single_data_t *csd;
int cpu, this_cpu = raw_smp_processor_id();

if (cpus_stopped)
return;

atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
smp_call_function(machine_crash_nonpanic_core, NULL, false);
for_each_online_cpu(cpu) {
if (cpu == this_cpu)
continue;

csd = &per_cpu(cpu_stop_csd, cpu);
smp_call_function_single_async(cpu, csd);
}

msecs = 1000; /* Wait at most a second for the other cpus to stop */
while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
mdelay(1);
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Expand Up @@ -73,7 +73,7 @@
reg = <0x0 0xffc40000 0x0 0xc0000>;
record-size = <0x1000>;
console-size = <0x40000>;
msg-size = <0x20000 0x20000>;
pmsg-size = <0x20000>;
};

cmdline_mem: memory@ffd00000 {
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2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/qcom/sm6350.dtsi
Expand Up @@ -346,7 +346,7 @@
reg = <0 0xffc00000 0 0x100000>;
record-size = <0x1000>;
console-size = <0x40000>;
msg-size = <0x20000 0x20000>;
pmsg-size = <0x20000>;
ecc-size = <16>;
no-map;
};
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2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/qcom/sm8150-sony-xperia-kumano.dtsi
Expand Up @@ -127,7 +127,7 @@
reg = <0x0 0xffc00000 0x0 0x100000>;
record-size = <0x1000>;
console-size = <0x40000>;
msg-size = <0x20000 0x20000>;
pmsg-size = <0x20000>;
ecc-size = <16>;
no-map;
};
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2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/qcom/sm8250-sony-xperia-edo.dtsi
Expand Up @@ -126,7 +126,7 @@
reg = <0x0 0xffc00000 0x0 0x100000>;
record-size = <0x1000>;
console-size = <0x40000>;
msg-size = <0x20000 0x20000>;
pmsg-size = <0x20000>;
ecc-size = <16>;
no-map;
};
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4 changes: 2 additions & 2 deletions arch/arm64/kernel/hw_breakpoint.c
Expand Up @@ -654,7 +654,7 @@ static int breakpoint_handler(unsigned long unused, unsigned long esr,
perf_bp_event(bp, regs);

/* Do we need to handle the stepping? */
if (is_default_overflow_handler(bp))
if (uses_default_overflow_handler(bp))
step = 1;
unlock:
rcu_read_unlock();
Expand Down Expand Up @@ -733,7 +733,7 @@ static u64 get_distance_from_watchpoint(unsigned long addr, u64 val,
static int watchpoint_report(struct perf_event *wp, unsigned long addr,
struct pt_regs *regs)
{
int step = is_default_overflow_handler(wp);
int step = uses_default_overflow_handler(wp);
struct arch_hw_breakpoint *info = counter_arch_bp(wp);

info->trigger = addr;
Expand Down
2 changes: 1 addition & 1 deletion arch/mips/Makefile
Expand Up @@ -352,7 +352,7 @@ KBUILD_LDFLAGS += -m $(ld-emul)

ifdef need-compiler
CHECKFLAGS += $(shell $(CC) $(KBUILD_CFLAGS) -dM -E -x c /dev/null | \
egrep -vw '__GNUC_(MINOR_|PATCHLEVEL_)?_' | \
grep -E -vw '__GNUC_(MINOR_|PATCHLEVEL_)?_' | \
sed -e "s/^\#define /-D'/" -e "s/ /'='/" -e "s/$$/'/" -e 's/\$$/&&/g')
endif

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2 changes: 1 addition & 1 deletion arch/mips/vdso/Makefile
Expand Up @@ -71,7 +71,7 @@ KCOV_INSTRUMENT := n

# Check that we don't have PIC 'jalr t9' calls left
quiet_cmd_vdso_mips_check = VDSOCHK $@
cmd_vdso_mips_check = if $(OBJDUMP) --disassemble $@ | egrep -h "jalr.*t9" > /dev/null; \
cmd_vdso_mips_check = if $(OBJDUMP) --disassemble $@ | grep -E -h "jalr.*t9" > /dev/null; \
then (echo >&2 "$@: PIC 'jalr t9' calls are not supported"; \
rm -f $@; /bin/false); fi

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1 change: 1 addition & 0 deletions arch/powerpc/platforms/pseries/ibmebus.c
Expand Up @@ -455,6 +455,7 @@ static int __init ibmebus_bus_init(void)
if (err) {
printk(KERN_WARNING "%s: device_register returned %i\n",
__func__, err);
put_device(&ibmebus_bus_device);
bus_unregister(&ibmebus_bus_type);

return err;
Expand Down
8 changes: 7 additions & 1 deletion arch/riscv/kernel/elf_kexec.c
Expand Up @@ -98,7 +98,13 @@ static int elf_find_pbase(struct kimage *image, unsigned long kernel_len,
kbuf.image = image;
kbuf.buf_min = lowest_paddr;
kbuf.buf_max = ULONG_MAX;
kbuf.buf_align = PAGE_SIZE;

/*
* Current riscv boot protocol requires 2MB alignment for
* RV64 and 4MB alignment for RV32
*
*/
kbuf.buf_align = PMD_SIZE;
kbuf.mem = KEXEC_BUF_MEM_UNKNOWN;
kbuf.memsz = ALIGN(kernel_len, PAGE_SIZE);
kbuf.top_down = false;
Expand Down
8 changes: 8 additions & 0 deletions arch/x86/boot/compressed/ident_map_64.c
Expand Up @@ -67,6 +67,14 @@ static void *alloc_pgt_page(void *context)
return NULL;
}

/* Consumed more tables than expected? */
if (pages->pgt_buf_offset == BOOT_PGT_SIZE_WARN) {
debug_putstr("pgt_buf running low in " __FILE__ "\n");
debug_putstr("Need to raise BOOT_PGT_SIZE?\n");
debug_putaddr(pages->pgt_buf_offset);
debug_putaddr(pages->pgt_buf_size);
}

entry = pages->pgt_buf + pages->pgt_buf_offset;
pages->pgt_buf_offset += PAGE_SIZE;

Expand Down
45 changes: 31 additions & 14 deletions arch/x86/include/asm/boot.h
Expand Up @@ -40,23 +40,40 @@
#ifdef CONFIG_X86_64
# define BOOT_STACK_SIZE 0x4000

/*
* Used by decompressor's startup_32() to allocate page tables for identity
* mapping of the 4G of RAM in 4-level paging mode:
* - 1 level4 table;
* - 1 level3 table;
* - 4 level2 table that maps everything with 2M pages;
*
* The additional level5 table needed for 5-level paging is allocated from
* trampoline_32bit memory.
*/
# define BOOT_INIT_PGT_SIZE (6*4096)
# ifdef CONFIG_RANDOMIZE_BASE

/*
* Assuming all cross the 512GB boundary:
* 1 page for level4
* (2+2)*4 pages for kernel, param, cmd_line, and randomized kernel
* 2 pages for first 2M (video RAM: CONFIG_X86_VERBOSE_BOOTUP).
* Total is 19 pages.
* Total number of page tables kernel_add_identity_map() can allocate,
* including page tables consumed by startup_32().
*
* Worst-case scenario:
* - 5-level paging needs 1 level5 table;
* - KASLR needs to map kernel, boot_params, cmdline and randomized kernel,
* assuming all of them cross 256T boundary:
* + 4*2 level4 table;
* + 4*2 level3 table;
* + 4*2 level2 table;
* - X86_VERBOSE_BOOTUP needs to map the first 2M (video RAM):
* + 1 level4 table;
* + 1 level3 table;
* + 1 level2 table;
* Total: 28 tables
*
* Add 4 spare table in case decompressor touches anything beyond what is
* accounted above. Warn if it happens.
*/
# ifdef CONFIG_X86_VERBOSE_BOOTUP
# define BOOT_PGT_SIZE (19*4096)
# else /* !CONFIG_X86_VERBOSE_BOOTUP */
# define BOOT_PGT_SIZE (17*4096)
# endif
# else /* !CONFIG_RANDOMIZE_BASE */
# define BOOT_PGT_SIZE BOOT_INIT_PGT_SIZE
# endif
# define BOOT_PGT_SIZE_WARN (28*4096)
# define BOOT_PGT_SIZE (32*4096)

#else /* !CONFIG_X86_64 */
# define BOOT_STACK_SIZE 0x1000
Expand Down
8 changes: 8 additions & 0 deletions arch/x86/include/asm/linkage.h
Expand Up @@ -8,6 +8,14 @@
#undef notrace
#define notrace __attribute__((no_instrument_function))

#ifdef CONFIG_64BIT
/*
* The generic version tends to create spurious ENDBR instructions under
* certain conditions.
*/
#define _THIS_IP_ ({ unsigned long __here; asm ("lea 0(%%rip), %0" : "=r" (__here)); __here; })
#endif

#ifdef CONFIG_X86_32
#define asmlinkage CPP_ASMLINKAGE __attribute__((regparm(0)))
#endif /* CONFIG_X86_32 */
Expand Down
4 changes: 4 additions & 0 deletions arch/x86/purgatory/Makefile
Expand Up @@ -19,6 +19,10 @@ CFLAGS_sha256.o := -D__DISABLE_EXPORTS
# optimization flags.
KBUILD_CFLAGS := $(filter-out -fprofile-sample-use=% -fprofile-use=%,$(KBUILD_CFLAGS))

# When LTO is enabled, llvm emits many text sections, which is not supported
# by kexec. Remove -flto=* flags.
KBUILD_CFLAGS := $(filter-out $(CC_FLAGS_LTO),$(KBUILD_CFLAGS))

# When linking purgatory.ro with -r unresolved symbols are not checked,
# also link a purgatory.chk binary without -r to check for unresolved symbols.
PURGATORY_LDFLAGS := -e purgatory_start -z nodefaultlib
Expand Down
7 changes: 1 addition & 6 deletions block/bio-integrity.c
Expand Up @@ -124,23 +124,18 @@ int bio_integrity_add_page(struct bio *bio, struct page *page,
unsigned int len, unsigned int offset)
{
struct bio_integrity_payload *bip = bio_integrity(bio);
struct bio_vec *iv;

if (bip->bip_vcnt >= bip->bip_max_vcnt) {
printk(KERN_ERR "%s: bip_vec full\n", __func__);
return 0;
}

iv = bip->bip_vec + bip->bip_vcnt;

if (bip->bip_vcnt &&
bvec_gap_to_prev(&bdev_get_queue(bio->bi_bdev)->limits,
&bip->bip_vec[bip->bip_vcnt - 1], offset))
return 0;

iv->bv_page = page;
iv->bv_len = len;
iv->bv_offset = offset;
bvec_set_page(&bip->bip_vec[bip->bip_vcnt], page, len, offset);
bip->bip_vcnt++;

return len;
Expand Down
12 changes: 2 additions & 10 deletions block/bio.c
Expand Up @@ -976,10 +976,7 @@ int bio_add_hw_page(struct request_queue *q, struct bio *bio,
if (bio->bi_vcnt >= queue_max_segments(q))
return 0;

bvec = &bio->bi_io_vec[bio->bi_vcnt];
bvec->bv_page = page;
bvec->bv_len = len;
bvec->bv_offset = offset;
bvec_set_page(&bio->bi_io_vec[bio->bi_vcnt], page, len, offset);
bio->bi_vcnt++;
bio->bi_iter.bi_size += len;
return len;
Expand Down Expand Up @@ -1055,15 +1052,10 @@ EXPORT_SYMBOL_GPL(bio_add_zone_append_page);
void __bio_add_page(struct bio *bio, struct page *page,
unsigned int len, unsigned int off)
{
struct bio_vec *bv = &bio->bi_io_vec[bio->bi_vcnt];

WARN_ON_ONCE(bio_flagged(bio, BIO_CLONED));
WARN_ON_ONCE(bio_full(bio, len));

bv->bv_page = page;
bv->bv_offset = off;
bv->bv_len = len;

bvec_set_page(&bio->bi_io_vec[bio->bi_vcnt], page, len, off);
bio->bi_iter.bi_size += len;
bio->bi_vcnt++;
}
Expand Down
6 changes: 3 additions & 3 deletions crypto/lrw.c
Expand Up @@ -357,10 +357,10 @@ static int lrw_create(struct crypto_template *tmpl, struct rtattr **tb)
* cipher name.
*/
if (!strncmp(cipher_name, "ecb(", 4)) {
unsigned len;
int len;

len = strlcpy(ecb_name, cipher_name + 4, sizeof(ecb_name));
if (len < 2 || len >= sizeof(ecb_name))
len = strscpy(ecb_name, cipher_name + 4, sizeof(ecb_name));
if (len < 2)
goto err_free_inst;

if (ecb_name[len - 1] != ')')
Expand Down
6 changes: 3 additions & 3 deletions crypto/xts.c
Expand Up @@ -396,10 +396,10 @@ static int xts_create(struct crypto_template *tmpl, struct rtattr **tb)
* cipher name.
*/
if (!strncmp(cipher_name, "ecb(", 4)) {
unsigned len;
int len;

len = strlcpy(ctx->name, cipher_name + 4, sizeof(ctx->name));
if (len < 2 || len >= sizeof(ctx->name))
len = strscpy(ctx->name, cipher_name + 4, sizeof(ctx->name));
if (len < 2)
goto err_free_inst;

if (ctx->name[len - 1] != ')')
Expand Down
2 changes: 1 addition & 1 deletion drivers/acpi/acpica/psopcode.c
Expand Up @@ -603,7 +603,7 @@ const struct acpi_opcode_info acpi_gbl_aml_op_info[AML_NUM_OPCODES] = {

/* 7E */ ACPI_OP("Timer", ARGP_TIMER_OP, ARGI_TIMER_OP, ACPI_TYPE_ANY,
AML_CLASS_EXECUTE, AML_TYPE_EXEC_0A_0T_1R,
AML_FLAGS_EXEC_0A_0T_1R),
AML_FLAGS_EXEC_0A_0T_1R | AML_NO_OPERAND_RESOLVE),

/* ACPI 5.0 opcodes */

Expand Down
5 changes: 4 additions & 1 deletion drivers/acpi/arm64/iort.c
Expand Up @@ -1699,7 +1699,10 @@ static void __init arm_smmu_v3_pmcg_init_resources(struct resource *res,
static struct acpi_platform_list pmcg_plat_info[] __initdata = {
/* HiSilicon Hip08 Platform */
{"HISI ", "HIP08 ", 0, ACPI_SIG_IORT, greater_than_or_equal,
"Erratum #162001800", IORT_SMMU_V3_PMCG_HISI_HIP08},
"Erratum #162001800, Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP08},
/* HiSilicon Hip09 Platform */
{"HISI ", "HIP09 ", 0, ACPI_SIG_IORT, greater_than_or_equal,
"Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
{ }
};

Expand Down

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