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arm64: dts: qcom: sm8250-mtp: fix reset line polarity
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[ Upstream commit 15d9fcb ]

The driver for the codec, when resetting the chip, first drives the line
low, and then high. This means that the line is active low. Change the
annotation in the DTS accordingly.

Fixes: 36c9d01 ("arm64: dts: qcom: use GPIO flags for tlmm")
Fixes: 5a263cf ("arm64: dts: qcom: sm8250-mtp: Add wcd9380 audio codec node")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027074652.1044235-3-dmitry.torokhov@gmail.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
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dtor authored and gregkh committed Dec 31, 2022
1 parent 07fe270 commit c05e7b9
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/qcom/sm8250-mtp.dts
Original file line number Diff line number Diff line change
Expand Up @@ -635,7 +635,7 @@
wcd938x: codec {
compatible = "qcom,wcd9380-codec";
#sound-dai-cells = <1>;
reset-gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
vdd-buck-supply = <&vreg_s4a_1p8>;
vdd-rxtx-supply = <&vreg_s4a_1p8>;
vdd-io-supply = <&vreg_s4a_1p8>;
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