Skip to content

Commit

Permalink
drm/i915/guc: make default_lists const data
Browse files Browse the repository at this point in the history
[ Upstream commit dfa5e6e ]

The default_lists array should be in rodata.

Fixes: dce2bd5 ("drm/i915/guc: Add Gen9 registers for GuC error state capture.")
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221122141616.3469214-1-jani.nikula@intel.com
(cherry picked from commit 8b7f7a9)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
  • Loading branch information
jnikula authored and gregkh committed Dec 31, 2022
1 parent d7352b4 commit cbd17cb
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
Original file line number Diff line number Diff line change
Expand Up @@ -165,7 +165,7 @@ static const struct __guc_mmio_reg_descr empty_regs_list[] = {
}

/* List of lists */
static struct __guc_mmio_reg_descr_group default_lists[] = {
static const struct __guc_mmio_reg_descr_group default_lists[] = {
MAKE_REGLIST(default_global_regs, PF, GLOBAL, 0),
MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_RENDER_CLASS),
Expand Down

0 comments on commit cbd17cb

Please sign in to comment.