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arm64: dts: qcom: msm8998: Fix CPU/L2 idle state latency and residency
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[ Upstream commit 3f1dcaf ]

The entry/exit latency and minimum residency in state for the idle
states of MSM8998 were ..bad: first of all, for all of them the
timings were written for CPU sleep but the min-residency-us param
was miscalculated (supposedly, while porting this from downstream);
Then, the power collapse states are setting PC on both the CPU
cluster *and* the L2 cache, which have different timings: in the
specific case of L2 the times are higher so these ones should be
taken into account instead of the CPU ones.

This parameter misconfiguration was not giving particular issues
because on MSM8998 there was no CPU scaling at all, so cluster/L2
power collapse was rarely (if ever) hit.
When CPU scaling is enabled, though, the wrong timings will produce
SoC unstability shown to the user as random, apparently error-less,
sudden reboots and/or lockups.

This set of parameters are stabilizing the SoC when CPU scaling is
ON and when power collapse is frequently hit.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210901183123.1087392-3-angelogioacchino.delregno@somainline.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
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kholk authored and gregkh committed Nov 26, 2021
1 parent 568d94c commit e52fecd
Showing 1 changed file with 12 additions and 8 deletions.
20 changes: 12 additions & 8 deletions arch/arm64/boot/dts/qcom/msm8998.dtsi
Expand Up @@ -300,38 +300,42 @@
LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
compatible = "arm,idle-state";
idle-state-name = "little-retention";
/* CPU Retention (C2D), L2 Active */
arm,psci-suspend-param = <0x00000002>;
entry-latency-us = <81>;
exit-latency-us = <86>;
min-residency-us = <200>;
min-residency-us = <504>;
};

LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
compatible = "arm,idle-state";
idle-state-name = "little-power-collapse";
/* CPU + L2 Power Collapse (C3, D4) */
arm,psci-suspend-param = <0x40000003>;
entry-latency-us = <273>;
exit-latency-us = <612>;
min-residency-us = <1000>;
entry-latency-us = <814>;
exit-latency-us = <4562>;
min-residency-us = <9183>;
local-timer-stop;
};

BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
compatible = "arm,idle-state";
idle-state-name = "big-retention";
/* CPU Retention (C2D), L2 Active */
arm,psci-suspend-param = <0x00000002>;
entry-latency-us = <79>;
exit-latency-us = <82>;
min-residency-us = <200>;
min-residency-us = <1302>;
};

BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
compatible = "arm,idle-state";
idle-state-name = "big-power-collapse";
/* CPU + L2 Power Collapse (C3, D4) */
arm,psci-suspend-param = <0x40000003>;
entry-latency-us = <336>;
exit-latency-us = <525>;
min-residency-us = <1000>;
entry-latency-us = <724>;
exit-latency-us = <2027>;
min-residency-us = <9419>;
local-timer-stop;
};
};
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