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Merge tag 'v5.10.102' into 5.10
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This is the 5.10.102 stable release
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xanmod committed Feb 23, 2022
2 parents f5b5ea2 + 47667ef commit ffc4263
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Showing 141 changed files with 1,020 additions and 510 deletions.
2 changes: 1 addition & 1 deletion Makefile
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 5
PATCHLEVEL = 10
SUBLEVEL = 101
SUBLEVEL = 102
EXTRAVERSION =
NAME = Dare mighty things

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2 changes: 1 addition & 1 deletion arch/arm/mach-omap2/display.c
Expand Up @@ -263,9 +263,9 @@ static int __init omapdss_init_of(void)
}

r = of_platform_populate(node, NULL, NULL, &pdev->dev);
put_device(&pdev->dev);
if (r) {
pr_err("Unable to populate DSS submodule devices\n");
put_device(&pdev->dev);
return r;
}

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4 changes: 3 additions & 1 deletion arch/arm/mach-omap2/omap_hwmod.c
Expand Up @@ -749,8 +749,10 @@ static int __init _init_clkctrl_providers(void)

for_each_matching_node(np, ti_clkctrl_match_table) {
ret = _setup_clkctrl_provider(np);
if (ret)
if (ret) {
of_node_put(np);
break;
}
}

return ret;
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6 changes: 6 additions & 0 deletions arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
Expand Up @@ -101,6 +101,12 @@
no-map;
};

/* 32 MiB reserved for ARM Trusted Firmware (BL32) */
secmon_reserved_bl32: secmon@5300000 {
reg = <0x0 0x05300000 0x0 0x2000000>;
no-map;
};

linux,cma {
compatible = "shared-dma-pool";
reusable;
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8 changes: 0 additions & 8 deletions arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
Expand Up @@ -157,14 +157,6 @@
regulator-always-on;
};

reserved-memory {
/* TEE Reserved Memory */
bl32_reserved: bl32@5000000 {
reg = <0x0 0x05300000 0x0 0x2000000>;
no-map;
};
};

sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
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6 changes: 6 additions & 0 deletions arch/arm64/boot/dts/amlogic/meson-gx.dtsi
Expand Up @@ -43,6 +43,12 @@
no-map;
};

/* 32 MiB reserved for ARM Trusted Firmware (BL32) */
secmon_reserved_bl32: secmon@5300000 {
reg = <0x0 0x05300000 0x0 0x2000000>;
no-map;
};

linux,cma {
compatible = "shared-dma-pool";
reusable;
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8 changes: 0 additions & 8 deletions arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
Expand Up @@ -203,14 +203,6 @@
regulator-always-on;
};

reserved-memory {
/* TEE Reserved Memory */
bl32_reserved: bl32@5000000 {
reg = <0x0 0x05300000 0x0 0x2000000>;
no-map;
};
};

sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
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18 changes: 18 additions & 0 deletions arch/parisc/lib/iomap.c
Expand Up @@ -346,6 +346,16 @@ u64 ioread64be(const void __iomem *addr)
return *((u64 *)addr);
}

u64 ioread64_lo_hi(const void __iomem *addr)
{
u32 low, high;

low = ioread32(addr);
high = ioread32(addr + sizeof(u32));

return low + ((u64)high << 32);
}

u64 ioread64_hi_lo(const void __iomem *addr)
{
u32 low, high;
Expand Down Expand Up @@ -419,6 +429,12 @@ void iowrite64be(u64 datum, void __iomem *addr)
}
}

void iowrite64_lo_hi(u64 val, void __iomem *addr)
{
iowrite32(val, addr);
iowrite32(val >> 32, addr + sizeof(u32));
}

void iowrite64_hi_lo(u64 val, void __iomem *addr)
{
iowrite32(val >> 32, addr + sizeof(u32));
Expand Down Expand Up @@ -527,6 +543,7 @@ EXPORT_SYMBOL(ioread32);
EXPORT_SYMBOL(ioread32be);
EXPORT_SYMBOL(ioread64);
EXPORT_SYMBOL(ioread64be);
EXPORT_SYMBOL(ioread64_lo_hi);
EXPORT_SYMBOL(ioread64_hi_lo);
EXPORT_SYMBOL(iowrite8);
EXPORT_SYMBOL(iowrite16);
Expand All @@ -535,6 +552,7 @@ EXPORT_SYMBOL(iowrite32);
EXPORT_SYMBOL(iowrite32be);
EXPORT_SYMBOL(iowrite64);
EXPORT_SYMBOL(iowrite64be);
EXPORT_SYMBOL(iowrite64_lo_hi);
EXPORT_SYMBOL(iowrite64_hi_lo);
EXPORT_SYMBOL(ioread8_rep);
EXPORT_SYMBOL(ioread16_rep);
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9 changes: 4 additions & 5 deletions arch/parisc/mm/init.c
Expand Up @@ -346,9 +346,9 @@ static void __init setup_bootmem(void)

static bool kernel_set_to_readonly;

static void __init map_pages(unsigned long start_vaddr,
unsigned long start_paddr, unsigned long size,
pgprot_t pgprot, int force)
static void __ref map_pages(unsigned long start_vaddr,
unsigned long start_paddr, unsigned long size,
pgprot_t pgprot, int force)
{
pmd_t *pmd;
pte_t *pg_table;
Expand Down Expand Up @@ -458,7 +458,7 @@ void __init set_kernel_text_rw(int enable_read_write)
flush_tlb_all();
}

void __ref free_initmem(void)
void free_initmem(void)
{
unsigned long init_begin = (unsigned long)__init_begin;
unsigned long init_end = (unsigned long)__init_end;
Expand All @@ -472,7 +472,6 @@ void __ref free_initmem(void)
/* The init text pages are marked R-X. We have to
* flush the icache and mark them RW-
*
* This is tricky, because map_pages is in the init section.
* Do a dummy remap of the data section first (the data
* section is already PAGE_KERNEL) to pull in the TLB entries
* for map_kernel */
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2 changes: 2 additions & 0 deletions arch/powerpc/lib/sstep.c
Expand Up @@ -3062,12 +3062,14 @@ void emulate_update_regs(struct pt_regs *regs, struct instruction_op *op)
case BARRIER_EIEIO:
eieio();
break;
#ifdef CONFIG_PPC64
case BARRIER_LWSYNC:
asm volatile("lwsync" : : : "memory");
break;
case BARRIER_PTESYNC:
asm volatile("ptesync" : : : "memory");
break;
#endif
}
break;

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15 changes: 5 additions & 10 deletions arch/x86/kvm/pmu.c
Expand Up @@ -95,7 +95,7 @@ static void kvm_perf_overflow_intr(struct perf_event *perf_event,
}

static void pmc_reprogram_counter(struct kvm_pmc *pmc, u32 type,
unsigned config, bool exclude_user,
u64 config, bool exclude_user,
bool exclude_kernel, bool intr,
bool in_tx, bool in_tx_cp)
{
Expand Down Expand Up @@ -170,8 +170,8 @@ static bool pmc_resume_counter(struct kvm_pmc *pmc)

void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)
{
unsigned config, type = PERF_TYPE_RAW;
u8 event_select, unit_mask;
u64 config;
u32 type = PERF_TYPE_RAW;
struct kvm *kvm = pmc->vcpu->kvm;
struct kvm_pmu_event_filter *filter;
int i;
Expand Down Expand Up @@ -203,23 +203,18 @@ void reprogram_gp_counter(struct kvm_pmc *pmc, u64 eventsel)
if (!allow_event)
return;

event_select = eventsel & ARCH_PERFMON_EVENTSEL_EVENT;
unit_mask = (eventsel & ARCH_PERFMON_EVENTSEL_UMASK) >> 8;

if (!(eventsel & (ARCH_PERFMON_EVENTSEL_EDGE |
ARCH_PERFMON_EVENTSEL_INV |
ARCH_PERFMON_EVENTSEL_CMASK |
HSW_IN_TX |
HSW_IN_TX_CHECKPOINTED))) {
config = kvm_x86_ops.pmu_ops->find_arch_event(pmc_to_pmu(pmc),
event_select,
unit_mask);
config = kvm_x86_ops.pmu_ops->pmc_perf_hw_id(pmc);
if (config != PERF_COUNT_HW_MAX)
type = PERF_TYPE_HARDWARE;
}

if (type == PERF_TYPE_RAW)
config = eventsel & X86_RAW_EVENT_MASK;
config = eventsel & AMD64_RAW_EVENT_MASK;

if (pmc->current_config == eventsel && pmc_resume_counter(pmc))
return;
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3 changes: 1 addition & 2 deletions arch/x86/kvm/pmu.h
Expand Up @@ -24,8 +24,7 @@ struct kvm_event_hw_type_mapping {
};

struct kvm_pmu_ops {
unsigned (*find_arch_event)(struct kvm_pmu *pmu, u8 event_select,
u8 unit_mask);
unsigned int (*pmc_perf_hw_id)(struct kvm_pmc *pmc);
unsigned (*find_fixed_event)(int idx);
bool (*pmc_is_enabled)(struct kvm_pmc *pmc);
struct kvm_pmc *(*pmc_idx_to_pmc)(struct kvm_pmu *pmu, int pmc_idx);
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2 changes: 0 additions & 2 deletions arch/x86/kvm/svm/avic.c
Expand Up @@ -344,8 +344,6 @@ int avic_incomplete_ipi_interception(struct vcpu_svm *svm)
break;
}
case AVIC_IPI_FAILURE_INVALID_TARGET:
WARN_ONCE(1, "Invalid IPI target: index=%u, vcpu=%d, icr=%#0x:%#0x\n",
index, svm->vcpu.vcpu_id, icrh, icrl);
break;
case AVIC_IPI_FAILURE_INVALID_BACKING_PAGE:
WARN_ONCE(1, "Invalid backing page\n");
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8 changes: 4 additions & 4 deletions arch/x86/kvm/svm/pmu.c
Expand Up @@ -126,10 +126,10 @@ static inline struct kvm_pmc *get_gp_pmc_amd(struct kvm_pmu *pmu, u32 msr,
return &pmu->gp_counters[msr_to_index(msr)];
}

static unsigned amd_find_arch_event(struct kvm_pmu *pmu,
u8 event_select,
u8 unit_mask)
static unsigned int amd_pmc_perf_hw_id(struct kvm_pmc *pmc)
{
u8 event_select = pmc->eventsel & ARCH_PERFMON_EVENTSEL_EVENT;
u8 unit_mask = (pmc->eventsel & ARCH_PERFMON_EVENTSEL_UMASK) >> 8;
int i;

for (i = 0; i < ARRAY_SIZE(amd_event_mapping); i++)
Expand Down Expand Up @@ -312,7 +312,7 @@ static void amd_pmu_reset(struct kvm_vcpu *vcpu)
}

struct kvm_pmu_ops amd_pmu_ops = {
.find_arch_event = amd_find_arch_event,
.pmc_perf_hw_id = amd_pmc_perf_hw_id,
.find_fixed_event = amd_find_fixed_event,
.pmc_is_enabled = amd_pmc_is_enabled,
.pmc_idx_to_pmc = amd_pmc_idx_to_pmc,
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7 changes: 4 additions & 3 deletions arch/x86/kvm/svm/svm.c
Expand Up @@ -4103,6 +4103,10 @@ static bool svm_can_emulate_instruction(struct kvm_vcpu *vcpu, void *insn, int i
bool smep, smap, is_user;
unsigned long cr4;

/* Emulation is always possible when KVM has access to all guest state. */
if (!sev_guest(vcpu->kvm))
return true;

/*
* Detect and workaround Errata 1096 Fam_17h_00_0Fh.
*
Expand Down Expand Up @@ -4151,9 +4155,6 @@ static bool svm_can_emulate_instruction(struct kvm_vcpu *vcpu, void *insn, int i
smap = cr4 & X86_CR4_SMAP;
is_user = svm_get_cpl(vcpu) == 3;
if (smap && (!smep || is_user)) {
if (!sev_guest(vcpu->kvm))
return true;

pr_err_ratelimited("KVM: SEV Guest triggered AMD Erratum 1096\n");

/*
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9 changes: 5 additions & 4 deletions arch/x86/kvm/vmx/pmu_intel.c
Expand Up @@ -68,10 +68,11 @@ static void global_ctrl_changed(struct kvm_pmu *pmu, u64 data)
reprogram_counter(pmu, bit);
}

static unsigned intel_find_arch_event(struct kvm_pmu *pmu,
u8 event_select,
u8 unit_mask)
static unsigned int intel_pmc_perf_hw_id(struct kvm_pmc *pmc)
{
struct kvm_pmu *pmu = pmc_to_pmu(pmc);
u8 event_select = pmc->eventsel & ARCH_PERFMON_EVENTSEL_EVENT;
u8 unit_mask = (pmc->eventsel & ARCH_PERFMON_EVENTSEL_UMASK) >> 8;
int i;

for (i = 0; i < ARRAY_SIZE(intel_arch_events); i++)
Expand Down Expand Up @@ -432,7 +433,7 @@ static void intel_pmu_reset(struct kvm_vcpu *vcpu)
}

struct kvm_pmu_ops intel_pmu_ops = {
.find_arch_event = intel_find_arch_event,
.pmc_perf_hw_id = intel_pmc_perf_hw_id,
.find_fixed_event = intel_find_fixed_event,
.pmc_is_enabled = intel_pmc_is_enabled,
.pmc_idx_to_pmc = intel_pmc_idx_to_pmc,
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4 changes: 0 additions & 4 deletions arch/x86/xen/enlighten_pv.c
Expand Up @@ -1387,10 +1387,6 @@ asmlinkage __visible void __init xen_start_kernel(void)

xen_acpi_sleep_register();

/* Avoid searching for BIOS MP tables */
x86_init.mpparse.find_smp_config = x86_init_noop;
x86_init.mpparse.get_smp_config = x86_init_uint_noop;

xen_boot_params_init_edd();

#ifdef CONFIG_ACPI
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26 changes: 6 additions & 20 deletions arch/x86/xen/smp_pv.c
Expand Up @@ -149,28 +149,12 @@ int xen_smp_intr_init_pv(unsigned int cpu)
return rc;
}

static void __init xen_fill_possible_map(void)
{
int i, rc;

if (xen_initial_domain())
return;

for (i = 0; i < nr_cpu_ids; i++) {
rc = HYPERVISOR_vcpu_op(VCPUOP_is_up, i, NULL);
if (rc >= 0) {
num_processors++;
set_cpu_possible(i, true);
}
}
}

static void __init xen_filter_cpu_maps(void)
static void __init _get_smp_config(unsigned int early)
{
int i, rc;
unsigned int subtract = 0;

if (!xen_initial_domain())
if (early)
return;

num_processors = 0;
Expand Down Expand Up @@ -211,7 +195,6 @@ static void __init xen_pv_smp_prepare_boot_cpu(void)
* sure the old memory can be recycled. */
make_lowmem_page_readwrite(xen_initial_gdt);

xen_filter_cpu_maps();
xen_setup_vcpu_info_placement();

/*
Expand Down Expand Up @@ -491,5 +474,8 @@ static const struct smp_ops xen_smp_ops __initconst = {
void __init xen_smp_init(void)
{
smp_ops = xen_smp_ops;
xen_fill_possible_map();

/* Avoid searching for BIOS MP tables */
x86_init.mpparse.find_smp_config = x86_init_noop;
x86_init.mpparse.get_smp_config = _get_smp_config;
}
2 changes: 2 additions & 0 deletions block/bfq-iosched.c
Expand Up @@ -6404,6 +6404,8 @@ static void bfq_exit_queue(struct elevator_queue *e)
spin_unlock_irq(&bfqd->lock);
#endif

wbt_enable_default(bfqd->queue);

kfree(bfqd);
}

Expand Down
2 changes: 0 additions & 2 deletions block/elevator.c
Expand Up @@ -518,8 +518,6 @@ void elv_unregister_queue(struct request_queue *q)
kobject_del(&e->kobj);

e->registered = 0;
/* Re-enable throttling in case elevator disabled it */
wbt_enable_default(q);
}
}

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1 change: 1 addition & 0 deletions drivers/ata/libata-core.c
Expand Up @@ -3989,6 +3989,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {

/* devices that don't properly handle TRIM commands */
{ "SuperSSpeed S238*", NULL, ATA_HORKAGE_NOTRIM, },
{ "M88V29*", NULL, ATA_HORKAGE_NOTRIM, },

/*
* As defined, the DRAT (Deterministic Read After Trim) and RZAT
Expand Down

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