Merge pull request #14 from robert-lytton/master

Update assembly for XS2A
xcore · Oct 21, 2015 · 94f20a9 · 94f20a9
2 parents 7840b23 + 4052534
commit 94f20a9
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Showing 3 changed files with 19 additions and 1 deletion.
diff --git a/module_trycatch/src/trycatch_impl.h → module_trycatch/include/trycatch_impl.h b/module_trycatch/src/trycatch_impl.h → module_trycatch/include/trycatch_impl.h
diff --git a/module_trycatch/module_build_info b/module_trycatch/module_build_info
@@ -8,4 +8,3 @@
 # optimization level -O3).
 #
 # You can also set MODULE_XCC_C_FLAGS, MODULE_XCC_XC_FLAGS etc..
-
diff --git a/module_trycatch/src/trycatch_asm.S b/module_trycatch/src/trycatch_asm.S
@@ -9,7 +9,13 @@
 .globl trycatch_trap_handler
 .type trycatch_trap_handler, @function
 .align XS1_KEP_ALIGNMENT
+#ifdef __XS2A__
+.issue_mode single
 trycatch_trap_handler:
+  ENTSP_lu6 0
+#else
+trycatch_trap_handler:
+#endif
   // No need to save state since we end by calling longjmp.
 
   // Set sp to trycatch_state.
@@ -27,16 +33,29 @@ trycatch_trap_handler:
 
   // Store et and ed.
   get r11, et
+#ifdef __XS2A__
+  // An additional et bit (0x16) indicates
+  // the lane that caused the exception.
+  zext r11, 4
+#endif
   stw r11, sp[0]
   get r11, ed
   stw r11, sp[1]
 
   // Leave kernel mode.
   kret
 
+#ifdef __XS2A__
+.align 4
+.issue_mode single
+return_from_exception:
+  // Call longjump.
+  ENTSP_lu6 0
+#else
 .align 2
 return_from_exception:
   // Call longjump.
+#endif
   ldw r0, sp[2]
   ldc r1, 1
   bu longjmp