ASoC: meson: aiu: add support for the Meson8 and Meson8b SoC families

The AIU audio controller on the Meson8 and Meson8b SoC families is compatible with the one found in the later GXBB family. Add compatible strings for these two older SoC families so the driver can be loaded for them. Instead of using the I2S divider from the AIU_CLK_CTRL_MORE register we need to use the I2S divider from the AIU_CLK_CTRL register. This older register is less flexible because it only supports four divider settings (1, 2, 4, 8) compared to the AIU_CLK_CTRL_MORE register (which supports dividers in the range 0..64). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
xdarklight · Feb 16, 2020 · 5cecc91 · jeromebrunet · Feb 17, 2020 · xdarklight
1 parent bdac178
commit 5cecc91
Show file tree

Hide file tree

Showing 4 changed files with 27 additions and 6 deletions.
diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig
@@ -9,7 +9,7 @@ config SND_MESON_AIU
 	imply SND_SOC_HDMI_CODEC if DRM_MESON_DW_HDMI
 	help
 	  Select Y or M to add support for the Audio output subsystem found
-	  in the Amlogic GX SoC family
+	  in the Amlogic Meson8, Meson8b and GX SoC families
 
 config SND_MESON_AXG_FIFO
 	tristate

diff --git a/sound/soc/meson/aiu-encoder-i2s.c b/sound/soc/meson/aiu-encoder-i2s.c
@@ -116,6 +116,7 @@ static int aiu_encoder_i2s_set_clocks(struct snd_soc_component *component,
 {
 	struct aiu *aiu = snd_soc_component_get_drvdata(component);
 	unsigned int srate = params_rate(params);
+	u8 i2s_div, more_i2s_div;
 	unsigned int fs, bs;
 
 	/* Get the oversampling factor */
@@ -135,10 +136,6 @@ static int aiu_encoder_i2s_set_clocks(struct snd_soc_component *component,
 				      FIELD_PREP(AIU_CODEC_DAC_LRCLK_CTRL_DIV,
 						 64 - 1));
 
-	/* Use CLK_MORE for mclk to bclk divider */
-	snd_soc_component_update_bits(component, AIU_CLK_CTRL,
-				      AIU_CLK_CTRL_I2S_DIV, 0);
-
 	/*
 	 * NOTE: this HW is odd.
 	 * In most configuration, the i2s divider is 'mclk / blck'.
@@ -156,10 +153,24 @@ static int aiu_encoder_i2s_set_clocks(struct snd_soc_component *component,
 		bs += bs / 2;
 	}
 
+	if (aiu->platform->has_clk_ctrl_more_i2s_div) {
+		/* Use CLK_MORE for mclk to bclk divider */
+		i2s_div = 0;
+		more_i2s_div = bs - 1;
+	} else {
+		i2s_div = __ffs(bs);
+		more_i2s_div = 0;
+	}
+
+	snd_soc_component_update_bits(component, AIU_CLK_CTRL,
+				      AIU_CLK_CTRL_I2S_DIV,
+				      FIELD_PREP(AIU_CLK_CTRL_I2S_DIV,
+						 i2s_div));
+
 	snd_soc_component_update_bits(component, AIU_CLK_CTRL_MORE,
 				      AIU_CLK_CTRL_MORE_I2S_DIV,
 				      FIELD_PREP(AIU_CLK_CTRL_MORE_I2S_DIV,
-						 bs - 1));
+						 more_i2s_div));
 
 	/* Make sure amclk is used for HDMI i2s as well */
 	snd_soc_component_update_bits(component, AIU_CLK_CTRL_MORE,

diff --git a/sound/soc/meson/aiu.c b/sound/soc/meson/aiu.c
@@ -371,15 +371,24 @@ static int aiu_remove(struct platform_device *pdev)
 
 static const struct aiu_platform_data aiu_gxbb_pdata = {
 	.has_acodec = false,
+	.has_clk_ctrl_more_i2s_div = true,
 };
 
 static const struct aiu_platform_data aiu_gxl_pdata = {
 	.has_acodec = true,
+	.has_clk_ctrl_more_i2s_div = true,
+};
+
+static const struct aiu_platform_data aiu_meson8_pdata = {
+	.has_acodec = false,
+	.has_clk_ctrl_more_i2s_div = false,
 };
 
 static const struct of_device_id aiu_of_match[] = {
 	{ .compatible = "amlogic,aiu-gxbb", .data = &aiu_gxbb_pdata },
 	{ .compatible = "amlogic,aiu-gxl", .data = &aiu_gxl_pdata },
+	{ .compatible = "amlogic,aiu-meson8", .data = &aiu_meson8_pdata },
+	{ .compatible = "amlogic,aiu-meson8b", .data = &aiu_meson8_pdata },
 	{}
 };
 MODULE_DEVICE_TABLE(of, aiu_of_match);

diff --git a/sound/soc/meson/aiu.h b/sound/soc/meson/aiu.h
@@ -31,6 +31,7 @@ struct aiu_interface {
 
 struct aiu_platform_data {
 	bool has_acodec;
+	bool has_clk_ctrl_more_i2s_div;
 };
 
 struct aiu {