dialects/riscv: Add liveness block naive register allocation strategy

[compor]

This PR adds a liveness use-def register allocation strategy that works on blocks.
It traverses the use-def SSA chain backwards (i.e., from uses to defs) and

1. allocates registers for operands
2. frees registers for results (since that will be the last time they appear when going backwards)

for op in block.walk_reverse():
  for operand in op.operands:
     if operand is not allocated:
          allocate(operand)
  
for result in op.results:
  if result is not allocated:
      allocate(result)
      free_before_next_instruction.append(result)
  else:
      free(result)

[codecov]

Codecov Report

Patch coverage: 87.27% and project coverage change: -0.01 ⚠️

Comparison is base (9a718f6) 88.94% compared to head (d7aa81e) 88.93%.

Additional details and impacted files

@@            Coverage Diff             @@
##             main    #1220      +/-   ##
==========================================
- Coverage   88.94%   88.93%   -0.01%     
==========================================
  Files         175      175              
  Lines       23590    23642      +52     
  Branches     3568     3587      +19     
==========================================
+ Hits        20981    21026      +45     
- Misses       2042     2044       +2     
- Partials      567      572       +5     

Impacted Files	Coverage Δ
xdsl/backend/riscv/register_allocation.py	83.65% <86.53%> (+2.17%)	⬆️
xdsl/transforms/riscv_register_allocation.py	100.00% <100.00%> (ø)

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[adutilleul]

LGTM, I feel that more code could be shared amongst all strategies, like for instance having a proper abstraction for a RegisterSet; an helper like walk_blocks would also make the code easier to read but this should be done in other PRs.

[compor]

LGTM, I feel that more code could be shared amongst all strategies, like for instance having a proper abstraction for a RegisterSet; an helper like walk_blocks would also make the code easier to read but this should be done in other PRs.

I agree, but not for this PR ;) I'm glad that this makes it obvious though!