dialects: (riscv) Refactor register allocaton strategies

[compor]

This PR:

• Refactors all current allocation strategies:
  • Adds the is_allocated helper method/property to the register types (factored out from one of the strategies)
  • Regularizes the use of integer and float register sets (RegisterType/FloatRegisterType) across all strategies
  • Shortens a test case to expose the use of Riscemu infinite registers

[codecov]

Codecov Report

Patch coverage: 91.11% and project coverage change: +0.03 🎉

Comparison is base (2423d28) 89.12% compared to head (bd9a589) 89.16%.

Additional details and impacted files

@@            Coverage Diff             @@
##             main    #1266      +/-   ##
==========================================
+ Coverage   89.12%   89.16%   +0.03%     
==========================================
  Files         181      181              
  Lines       24073    24069       -4     
  Branches     3667     3657      -10     
==========================================
+ Hits        21455    21460       +5     
+ Misses       2040     2037       -3     
+ Partials      578      572       -6     

Impacted Files	Coverage Δ
xdsl/backend/riscv/register_allocation.py	91.20% <90.62%> (+7.55%)	⬆️
xdsl/dialects/riscv.py	83.76% <92.30%> (+0.16%)	⬆️

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[superlopuh]

some small comments, otherwise LGTM