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[WIP] transformations: (convert-riscv-to-llvm) #2468
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Some further reflection on this approach: It is functional, but the amount of unrealized conversion casts gets a bit ridiculous (see KULeuven-MICAS/snax-mlir#116). Also, the emission of riscv arithmetic in llvm inline assembly instead of regular llvm ir is a bit silly (not in the example). I think the following approach would make more sense: Create ops for the custom snitch operations (such as refactor the The lowerings would look like this:
I can work on this, but I would like to get your opinion on this first @AntonLydike @JosseVanDelm . |
@jorendumoulin I agree with your suggestion. CC @cappadokes |
Flattering your tag as may be @JosseVanDelm, I find Joren's mentioning of Anton much more meaningful. I don't have the knowledge to constructively comment on this discussion--but thanks again for considering me. |
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Oh no, we hit the magic interactive tests again :( |
@jorendumoulin I did a pass to handle named registers in puts differently. We now just print the register name in the assembly instead of going through the SSA value. Additionally, with #2797 we can now CSE delete the remaining I'll fix the problem with ops that return a |
This PR implements a conversion of riscv dialect to llvm using the inline assembly op.
This is useful such that any generated RISC-V code can also be used with an LLVM target like we use in
snax-mlir
.Specifically, this will be used to reuse the lowering of
snrt
toriscv
, without having to duplicate the entiresnrt-to-riscv
transform.@AntonLydike