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x86/shadow: suppress "fast fault path" optimization without reserved …
…bits When none of the physical address bits in PTEs are reserved, we can't create any 4k (leaf) PTEs which would trigger reserved bit faults. Hence the present SHOPT_FAST_FAULT_PATH machinery needs to be suppressed in this case, which is most easily achieved by never creating any magic entries. To compensate a little, eliminate sh_write_p2m_entry_post()'s impact on such hardware. While at it, also avoid using an MMIO magic entry when that would truncate the incoming GFN. Requested-by: Andrew Cooper <andrew.cooper3@citrix.com> Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Tim Deegan <tim@xen.org> Release-Acked-by: Ian Jackson <iwj@xenproject.org>
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