media: v4l2-subdev.h: add a msb_align_d0 to parallel config

Some sensor or ISP seems to align MSB of component to first data lane.
Add a config to describe the property.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>

include/media/v4l2-subdev.h

@@ -356,12 +356,14 @@ struct v4l2_mbus_frame_desc {
  * @vsync_active: vsync active state: true for high, false for low
  * @pclk_rising: pixel clock active edge: true for rising, false for falling
  * @data_active: data lines active state: true for high, false for low
+ * @msb_align_d0: true if msb of output is aligned to d0, otherwise false
  */
 struct v4l2_mbus_parallel_config {
 	bool hsync_active : 1;
 	bool vsync_active : 1;
 	bool pclk_rising : 1;
 	bool data_active : 1;
+	bool msb_align_d0 : 1;
 };
 
 /**