Add support for Arm intrinsics

site/doc/api/arm/aes.generated.md

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+---
+title: Arm Aes Intrinsics
+url: /doc/api/arm/aes/
+---
+
+In order to use the functions provided by this module, you need to import this module:
+
+```kalk
+>>> import HardwareIntrinsics
+```
+
+{{NOTE do}}
+These intrinsic functions are only available if your CPU supports `Aes` features.
+
+{{end}}
+
+
+## vaesdq_u8
+
+`vaesdq_u8`
+
+uint8x16_t vaesdq_u8 (uint8x16_t data, uint8x16_t key)
+A32: AESD.8 Qd, Qm
+A64: AESD Vd.16B, Vn.16B
+
+
+Instruction Documentation: [vaesdq_u8](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesdq_u8)
+
+## vaeseq_u8
+
+`vaeseq_u8`
+
+uint8x16_t vaeseq_u8 (uint8x16_t data, uint8x16_t key)
+A32: AESE.8 Qd, Qm
+A64: AESE Vd.16B, Vn.16B
+
+
+Instruction Documentation: [vaeseq_u8](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaeseq_u8)
+
+## vaesimcq_u8
+
+`vaesimcq_u8`
+
+uint8x16_t vaesimcq_u8 (uint8x16_t data)
+A32: AESIMC.8 Qd, Qm
+A64: AESIMC Vd.16B, Vn.16B
+
+
+Instruction Documentation: [vaesimcq_u8](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesimcq_u8)
+
+## vaesmcq_u8
+
+`vaesmcq_u8`
+
+uint8x16_t vaesmcq_u8 (uint8x16_t data)
+A32: AESMC.8 Qd, Qm
+A64: AESMC V>.16B, Vn.16B
+
+
+Instruction Documentation: [vaesmcq_u8](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesmcq_u8)
+
+## vmull_high_p64
+
+`vmull_high_p64`
+
+poly128_t vmull_high_p64 (poly64x2_t a, poly64x2_t b)
+A32: VMULL.P8 Qd, Dn+1, Dm+1
+A64: PMULL2 Vd.1Q, Vn.2D, Vm.2D
+
+
+Instruction Documentation: [vmull_high_p64](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmull_high_p64)
+
+## vmull_p64
+
+`vmull_p64`
+
+poly128_t vmull_p64 (poly64_t a, poly64_t b)
+A32: VMULL.P8 Qd, Dn, Dm
+A64: PMULL Vd.1Q, Vn.1D, Vm.1D
+
+
+Instruction Documentation: [vmull_p64](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmull_p64)

site/doc/api/arm/crc32.generated.md

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+---
+title: Arm Crc32 Intrinsics
+url: /doc/api/arm/crc32/
+---
+
+In order to use the functions provided by this module, you need to import this module:
+
+```kalk
+>>> import HardwareIntrinsics
+```
+
+{{NOTE do}}
+These intrinsic functions are only available if your CPU supports `Crc32` features.
+
+{{end}}
+
+
+## crc32b
+
+`crc32b`
+
+uint32_t __crc32b (uint32_t a, uint8_t b)
+A32: CRC32B Rd, Rn, Rm
+A64: CRC32B Wd, Wn, Wm
+
+
+Instruction Documentation: [crc32b](https://developer.arm.com/architectures/instruction-sets/intrinsics/crc32b)
+
+## crc32cb
+
+`crc32cb`
+
+uint32_t __crc32cb (uint32_t a, uint8_t b)
+A32: CRC32CB Rd, Rn, Rm
+A64: CRC32CB Wd, Wn, Wm
+
+
+Instruction Documentation: [crc32cb](https://developer.arm.com/architectures/instruction-sets/intrinsics/crc32cb)
+
+## crc32ch
+
+`crc32ch`
+
+uint32_t __crc32ch (uint32_t a, uint16_t b)
+A32: CRC32CH Rd, Rn, Rm
+A64: CRC32CH Wd, Wn, Wm
+
+
+Instruction Documentation: [crc32ch](https://developer.arm.com/architectures/instruction-sets/intrinsics/crc32ch)
+
+## crc32cw
+
+`crc32cw`
+
+uint32_t __crc32cw (uint32_t a, uint32_t b)
+A32: CRC32CW Rd, Rn, Rm
+A64: CRC32CW Wd, Wn, Wm
+
+
+Instruction Documentation: [crc32cw](https://developer.arm.com/architectures/instruction-sets/intrinsics/crc32cw)
+
+## crc32h
+
+`crc32h`
+
+uint32_t __crc32h (uint32_t a, uint16_t b)
+A32: CRC32H Rd, Rn, Rm
+A64: CRC32H Wd, Wn, Wm
+
+
+Instruction Documentation: [crc32h](https://developer.arm.com/architectures/instruction-sets/intrinsics/crc32h)
+
+## crc32w
+
+`crc32w`
+
+uint32_t __crc32w (uint32_t a, uint32_t b)
+A32: CRC32W Rd, Rn, Rm
+A64: CRC32W Wd, Wn, Wm
+
+
+Instruction Documentation: [crc32w](https://developer.arm.com/architectures/instruction-sets/intrinsics/crc32w)

site/doc/api/arm/crc32arm64.generated.md

@@ -0,0 +1,36 @@
+---
+title: Arm Crc32Arm64 Intrinsics
+url: /doc/api/arm/crc32arm64/
+---
+
+In order to use the functions provided by this module, you need to import this module:
+
+```kalk
+>>> import HardwareIntrinsics
+```
+
+{{NOTE do}}
+These intrinsic functions are only available if your CPU supports `Crc32Arm64` features.
+
+{{end}}
+
+
+## crc32cd
+
+`crc32cd`
+
+uint32_t __crc32cd (uint32_t a, uint64_t b)
+A64: CRC32CX Wd, Wn, Xm
+
+
+Instruction Documentation: [crc32cd](https://developer.arm.com/architectures/instruction-sets/intrinsics/crc32cd)
+
+## crc32d
+
+`crc32d`
+
+uint32_t __crc32d (uint32_t a, uint64_t b)
+A64: CRC32X Wd, Wn, Xm
+
+
+Instruction Documentation: [crc32d](https://developer.arm.com/architectures/instruction-sets/intrinsics/crc32d)

site/doc/api/arm/menu.yml

@@ -0,0 +1,7 @@
+- advsimd.generated.md
+- advsimdarm64.generated.md
+- aes.generated.md
+- crc32.generated.md
+- crc32arm64.generated.md
+- sha1.generated.md
+- sha256.generated.md

site/doc/api/arm/readme.md

@@ -0,0 +1,19 @@
+---
+title: Arm Hardware Intrinsics
+---
+
+Module with Arm CPU Hardware intrinsics.
+
+In order to use the functions provided by this module, you need to import this module:
+
+```kalk
+>>> import HardwareIntrinsics
+```
+
+{{NOTE do}}
+Depending on the characteristics of your CPU (e.g `AdvSimd`, `Aes`...), this module will import only the intrinsic functions supported by your CPU.
+{{end}}
+
+## Usage
+
+TBD

site/doc/api/arm/sha1.generated.md

@@ -0,0 +1,82 @@
+---
+title: Arm Sha1 Intrinsics
+url: /doc/api/arm/sha1/
+---
+
+In order to use the functions provided by this module, you need to import this module:
+
+```kalk
+>>> import HardwareIntrinsics
+```
+
+{{NOTE do}}
+These intrinsic functions are only available if your CPU supports `Sha1` features.
+
+{{end}}
+
+
+## vsha1cq_u32
+
+`vsha1cq_u32`
+
+uint32x4_t vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
+A32: SHA1C.32 Qd, Qn, Qm
+A64: SHA1C Qd, Sn, Vm.4S
+
+
+Instruction Documentation: [vsha1cq_u32](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha1cq_u32)
+
+## vsha1h_u32
+
+`vsha1h_u32`
+
+uint32_t vsha1h_u32 (uint32_t hash_e)
+A32: SHA1H.32 Qd, Qm
+A64: SHA1H Sd, Sn
+
+
+Instruction Documentation: [vsha1h_u32](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha1h_u32)
+
+## vsha1mq_u32
+
+`vsha1mq_u32`
+
+uint32x4_t vsha1mq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
+A32: SHA1M.32 Qd, Qn, Qm
+A64: SHA1M Qd, Sn, Vm.4S
+
+
+Instruction Documentation: [vsha1mq_u32](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha1mq_u32)
+
+## vsha1pq_u32
+
+`vsha1pq_u32`
+
+uint32x4_t vsha1pq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
+A32: SHA1P.32 Qd, Qn, Qm
+A64: SHA1P Qd, Sn, Vm.4S
+
+
+Instruction Documentation: [vsha1pq_u32](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha1pq_u32)
+
+## vsha1su0q_u32
+
+`vsha1su0q_u32`
+
+uint32x4_t vsha1su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7, uint32x4_t w8_11)
+A32: SHA1SU0.32 Qd, Qn, Qm
+A64: SHA1SU0 Vd.4S, Vn.4S, Vm.4S
+
+
+Instruction Documentation: [vsha1su0q_u32](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha1su0q_u32)
+
+## vsha1su1q_u32
+
+`vsha1su1q_u32`
+
+uint32x4_t vsha1su1q_u32 (uint32x4_t tw0_3, uint32x4_t w12_15)
+A32: SHA1SU1.32 Qd, Qm
+A64: SHA1SU1 Vd.4S, Vn.4S
+
+
+Instruction Documentation: [vsha1su1q_u32](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha1su1q_u32)

site/doc/api/arm/sha256.generated.md

@@ -0,0 +1,60 @@
+---
+title: Arm Sha256 Intrinsics
+url: /doc/api/arm/sha256/
+---
+
+In order to use the functions provided by this module, you need to import this module:
+
+```kalk
+>>> import HardwareIntrinsics
+```
+
+{{NOTE do}}
+These intrinsic functions are only available if your CPU supports `Sha256` features.
+
+{{end}}
+
+
+## vsha256h2q_u32
+
+`vsha256h2q_u32`
+
+uint32x4_t vsha256h2q_u32 (uint32x4_t hash_efgh, uint32x4_t hash_abcd, uint32x4_t wk)
+A32: SHA256H2.32 Qd, Qn, Qm
+A64: SHA256H2 Qd, Qn, Vm.4S
+
+
+Instruction Documentation: [vsha256h2q_u32](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha256h2q_u32)
+
+## vsha256hq_u32
+
+`vsha256hq_u32`
+
+uint32x4_t vsha256hq_u32 (uint32x4_t hash_abcd, uint32x4_t hash_efgh, uint32x4_t wk)
+A32: SHA256H.32 Qd, Qn, Qm
+A64: SHA256H Qd, Qn, Vm.4S
+
+
+Instruction Documentation: [vsha256hq_u32](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha256hq_u32)
+
+## vsha256su0q_u32
+
+`vsha256su0q_u32`
+
+uint32x4_t vsha256su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7)
+A32: SHA256SU0.32 Qd, Qm
+A64: SHA256SU0 Vd.4S, Vn.4S
+
+
+Instruction Documentation: [vsha256su0q_u32](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha256su0q_u32)
+
+## vsha256su1q_u32
+
+`vsha256su1q_u32`
+
+uint32x4_t vsha256su1q_u32 (uint32x4_t w0_3, uint32x4_t w8_11, uint32x4_t w12_15)
+A32: SHA256SU1.32 Qd, Qn, Qm
+A64: SHA256SU1 Vd.4S, Vn.4S, Vm.4S
+
+
+Instruction Documentation: [vsha256su1q_u32](https://developer.arm.com/architectures/instruction-sets/intrinsics/vsha256su1q_u32)

site/doc/api/menu.yml

@@ -11,4 +11,5 @@
 - standardunits.generated.md
 - strings.generated.md
 - web.generated.md
-- {path: intel/readme.md, folder: true}
+- {path: intel/readme.md, folder: true}
+- {path: arm/readme.md, folder: true}