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XrdCl: Use std::atomic when possible for the PostMaster pointer #265
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You already hold explicit mutex when you do mutations, so |
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Thanks @ljanyst, I've update the pull request to use |
You're welcome. I would strongly recommend making a fix for non-c++11 clients as well. |
There is already one. #266 :) |
@esindril - did you push the update? It still seems to be using too-strong of memory ordering. |
As-is, PostMaster* post_master = sPostMaster.exchange(nullptr);
if (post_master) {
...
delete post_master;
} This guarantees only one thread enters the conditional block. |
It uses So, I don't know exactly what was the initial idea here ... maybe @ljanyst knows more? |
@esindril - my point is that you could use memory_order_relaxed outside the lock too because the sPostMaster pointer is reloaded after the lock is taken. |
Now, the dynamically allocated object should be properly destroyed by the client. If they fail to do this before the exit call then this is an application error. If they are automatically managed i.e. shared_ptr then they fall in the previous category of stack objects. So, how can an user object still refer to us in this case? Shouldn't all user objects be destroyed by the time we get to the Finalize method. Of course, except the user static ones ... |
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Ok, it wasn't clear for me what you were referring to before. Given that this only covers C++11, I will drop this pull request in favour of #266 which uses the |
Hi all,
I've created this pull request which deals with the atomicity of the sPostMaster pointer. This is only enforced when compiled with c++11 support. Let me know if this is acceptable for you or if you want the __sync_fetch* approach. The reason for this is that on x86_64 architectures this approach has no performance penalty for the load operation.
For example the following code:
yields the following assembler code on x86_64 for the two functions:
Therefore the get operation is no different on the atomic variable than on the non-atomic one.
For an ARM architecture, the the issue is totally different. The assembler code for the same functions is:
Therefore, the trade-off is that when you compile for ARM it will be a bit slower and you need to use c++11 which I assume is already the case for the CMSSW where c++11 is omnipresent.
Let me know your thoughts on this and if everything is fine, I will merge it tomorrow.
Cheers,
Elvin